1c830b87aSAswath Govindraju# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c830b87aSAswath Govindraju%YAML 1.2 3c830b87aSAswath Govindraju--- 4c830b87aSAswath Govindraju$id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml# 5c830b87aSAswath Govindraju$schema: http://devicetree.org/meta-schemas/core.yaml# 6c830b87aSAswath Govindraju 7c830b87aSAswath Govindrajutitle: GPIO controller for Davinci and keystone devices 8c830b87aSAswath Govindraju 9c830b87aSAswath Govindrajumaintainers: 10c830b87aSAswath Govindraju - Keerthy <j-keerthy@ti.com> 11c830b87aSAswath Govindraju 12c830b87aSAswath Govindrajuproperties: 13c830b87aSAswath Govindraju compatible: 14c830b87aSAswath Govindraju oneOf: 15c830b87aSAswath Govindraju - items: 16c830b87aSAswath Govindraju - enum: 17c830b87aSAswath Govindraju - ti,k2g-gpio 18c830b87aSAswath Govindraju - ti,am654-gpio 19c830b87aSAswath Govindraju - ti,j721e-gpio 20c830b87aSAswath Govindraju - ti,am64-gpio 21c830b87aSAswath Govindraju - const: ti,keystone-gpio 22c830b87aSAswath Govindraju 23c830b87aSAswath Govindraju - items: 24c830b87aSAswath Govindraju - enum: 25c830b87aSAswath Govindraju - ti,dm6441-gpio 26c830b87aSAswath Govindraju - ti,keystone-gpio 27c830b87aSAswath Govindraju 28c830b87aSAswath Govindraju reg: 29c830b87aSAswath Govindraju maxItems: 1 30c830b87aSAswath Govindraju 31c830b87aSAswath Govindraju gpio-controller: true 32c830b87aSAswath Govindraju 33c830b87aSAswath Govindraju gpio-ranges: true 34c830b87aSAswath Govindraju 35c830b87aSAswath Govindraju gpio-line-names: 36c830b87aSAswath Govindraju description: strings describing the names of each gpio line. 37c830b87aSAswath Govindraju minItems: 1 38*40059212SNishanth Menon maxItems: 144 39c830b87aSAswath Govindraju 40c830b87aSAswath Govindraju "#gpio-cells": 41c830b87aSAswath Govindraju const: 2 42c830b87aSAswath Govindraju description: 43c830b87aSAswath Govindraju first cell is the pin number and second cell is used to specify optional parameters (unused). 44c830b87aSAswath Govindraju 45c830b87aSAswath Govindraju interrupts: 46c830b87aSAswath Govindraju description: 47c830b87aSAswath Govindraju The interrupts are specified as per the interrupt parent. Only banked 48c830b87aSAswath Govindraju or unbanked IRQs are supported at a time. If the interrupts are 49c830b87aSAswath Govindraju banked then provide list of interrupts corresponding to each bank, else 50c830b87aSAswath Govindraju provide the list of interrupts for each gpio. 51c830b87aSAswath Govindraju minItems: 1 52c830b87aSAswath Govindraju maxItems: 100 53c830b87aSAswath Govindraju 54c830b87aSAswath Govindraju ti,ngpio: 55c830b87aSAswath Govindraju $ref: /schemas/types.yaml#/definitions/uint32 56c830b87aSAswath Govindraju description: The number of GPIO pins supported consecutively. 57c830b87aSAswath Govindraju minimum: 1 58c830b87aSAswath Govindraju 59c830b87aSAswath Govindraju ti,davinci-gpio-unbanked: 60c830b87aSAswath Govindraju $ref: /schemas/types.yaml#/definitions/uint32 61c830b87aSAswath Govindraju description: The number of GPIOs that have an individual interrupt line to processor. 62c830b87aSAswath Govindraju minimum: 0 63c830b87aSAswath Govindraju 64c830b87aSAswath Govindraju clocks: 65c830b87aSAswath Govindraju maxItems: 1 66c830b87aSAswath Govindraju 67c830b87aSAswath Govindraju clock-names: 68c830b87aSAswath Govindraju const: gpio 69c830b87aSAswath Govindraju 70c830b87aSAswath Govindraju interrupt-controller: true 71c830b87aSAswath Govindraju 72c830b87aSAswath Govindraju power-domains: 73c830b87aSAswath Govindraju maxItems: 1 74c830b87aSAswath Govindraju 75c830b87aSAswath Govindraju "#interrupt-cells": 76c830b87aSAswath Govindraju const: 2 77c830b87aSAswath Govindraju 78c830b87aSAswath GovindrajupatternProperties: 79c830b87aSAswath Govindraju "^(.+-hog(-[0-9]+)?)$": 80c830b87aSAswath Govindraju type: object 81c830b87aSAswath Govindraju 82c830b87aSAswath Govindraju required: 83c830b87aSAswath Govindraju - gpio-hog 84c830b87aSAswath Govindraju 85c830b87aSAswath Govindrajurequired: 86c830b87aSAswath Govindraju - compatible 87c830b87aSAswath Govindraju - reg 88c830b87aSAswath Govindraju - gpio-controller 89c830b87aSAswath Govindraju - "#gpio-cells" 90c830b87aSAswath Govindraju - interrupts 91c830b87aSAswath Govindraju - ti,ngpio 92c830b87aSAswath Govindraju - ti,davinci-gpio-unbanked 93c830b87aSAswath Govindraju - clocks 94c830b87aSAswath Govindraju - clock-names 95c830b87aSAswath Govindraju 96c830b87aSAswath GovindrajuadditionalProperties: false 97c830b87aSAswath Govindraju 98c830b87aSAswath Govindrajuexamples: 99c830b87aSAswath Govindraju - | 100c830b87aSAswath Govindraju #include<dt-bindings/interrupt-controller/arm-gic.h> 101c830b87aSAswath Govindraju 102c830b87aSAswath Govindraju gpio0: gpio@2603000 { 103c830b87aSAswath Govindraju compatible = "ti,k2g-gpio", "ti,keystone-gpio"; 104c830b87aSAswath Govindraju reg = <0x02603000 0x100>; 105c830b87aSAswath Govindraju gpio-controller; 106c830b87aSAswath Govindraju #gpio-cells = <2>; 107c830b87aSAswath Govindraju interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, 108c830b87aSAswath Govindraju <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, 109c830b87aSAswath Govindraju <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>, 110c830b87aSAswath Govindraju <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>, 111c830b87aSAswath Govindraju <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>, 112c830b87aSAswath Govindraju <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>, 113c830b87aSAswath Govindraju <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>, 114c830b87aSAswath Govindraju <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>, 115c830b87aSAswath Govindraju <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>; 116c830b87aSAswath Govindraju interrupt-controller; 117c830b87aSAswath Govindraju #interrupt-cells = <2>; 118c830b87aSAswath Govindraju ti,ngpio = <144>; 119c830b87aSAswath Govindraju ti,davinci-gpio-unbanked = <0>; 120c830b87aSAswath Govindraju clocks = <&k2g_clks 0x001b 0x0>; 121c830b87aSAswath Govindraju clock-names = "gpio"; 122c830b87aSAswath Govindraju }; 123c830b87aSAswath Govindraju 124c830b87aSAswath Govindraju - | 125c830b87aSAswath Govindraju #include<dt-bindings/interrupt-controller/arm-gic.h> 126c830b87aSAswath Govindraju 127c830b87aSAswath Govindraju gpio1: gpio@260bf00 { 128c830b87aSAswath Govindraju compatible = "ti,keystone-gpio"; 129c830b87aSAswath Govindraju reg = <0x0260bf00 0x100>; 130c830b87aSAswath Govindraju gpio-controller; 131c830b87aSAswath Govindraju #gpio-cells = <2>; 132c830b87aSAswath Govindraju /* HW Interrupts mapped to GPIO pins */ 133c830b87aSAswath Govindraju interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, 134c830b87aSAswath Govindraju <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, 135c830b87aSAswath Govindraju <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, 136c830b87aSAswath Govindraju <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, 137c830b87aSAswath Govindraju <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, 138c830b87aSAswath Govindraju <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, 139c830b87aSAswath Govindraju <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, 140c830b87aSAswath Govindraju <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, 141c830b87aSAswath Govindraju <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, 142c830b87aSAswath Govindraju <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, 143c830b87aSAswath Govindraju <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, 144c830b87aSAswath Govindraju <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, 145c830b87aSAswath Govindraju <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, 146c830b87aSAswath Govindraju <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, 147c830b87aSAswath Govindraju <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, 148c830b87aSAswath Govindraju <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, 149c830b87aSAswath Govindraju <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, 150c830b87aSAswath Govindraju <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, 151c830b87aSAswath Govindraju <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, 152c830b87aSAswath Govindraju <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, 153c830b87aSAswath Govindraju <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, 154c830b87aSAswath Govindraju <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, 155c830b87aSAswath Govindraju <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, 156c830b87aSAswath Govindraju <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, 157c830b87aSAswath Govindraju <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, 158c830b87aSAswath Govindraju <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, 159c830b87aSAswath Govindraju <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, 160c830b87aSAswath Govindraju <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, 161c830b87aSAswath Govindraju <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, 162c830b87aSAswath Govindraju <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, 163c830b87aSAswath Govindraju <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, 164c830b87aSAswath Govindraju <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; 165c830b87aSAswath Govindraju clocks = <&clkgpio>; 166c830b87aSAswath Govindraju clock-names = "gpio"; 167c830b87aSAswath Govindraju ti,ngpio = <32>; 168c830b87aSAswath Govindraju ti,davinci-gpio-unbanked = <32>; 169c830b87aSAswath Govindraju }; 170c830b87aSAswath Govindraju 171c830b87aSAswath Govindraju - | 172c830b87aSAswath Govindraju wkup_gpio0: gpio0@42110000 { 173c830b87aSAswath Govindraju compatible = "ti,am654-gpio", "ti,keystone-gpio"; 174c830b87aSAswath Govindraju reg = <0x42110000 0x100>; 175c830b87aSAswath Govindraju gpio-controller; 176c830b87aSAswath Govindraju #gpio-cells = <2>; 177c830b87aSAswath Govindraju interrupt-parent = <&intr_wkup_gpio>; 178c830b87aSAswath Govindraju interrupts = <60>, <61>, <62>, <63>; 179c830b87aSAswath Govindraju interrupt-controller; 180c830b87aSAswath Govindraju #interrupt-cells = <2>; 181c830b87aSAswath Govindraju ti,ngpio = <56>; 182c830b87aSAswath Govindraju ti,davinci-gpio-unbanked = <0>; 183c830b87aSAswath Govindraju clocks = <&k3_clks 59 0>; 184c830b87aSAswath Govindraju clock-names = "gpio"; 185c830b87aSAswath Govindraju }; 186