xref: /openbmc/linux/Documentation/devicetree/bindings/gpio/gpio-altera.txt (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
14fd9bbc6STien Hock LohAltera GPIO controller bindings
24fd9bbc6STien Hock Loh
34fd9bbc6STien Hock LohRequired properties:
44fd9bbc6STien Hock Loh- compatible:
54fd9bbc6STien Hock Loh  - "altr,pio-1.0"
64fd9bbc6STien Hock Loh- reg: Physical base address and length of the controller's registers.
74fd9bbc6STien Hock Loh- #gpio-cells : Should be 2
84fd9bbc6STien Hock Loh  - The first cell is the gpio offset number.
94fd9bbc6STien Hock Loh  - The second cell is reserved and is currently unused.
104fd9bbc6STien Hock Loh- gpio-controller : Marks the device node as a GPIO controller.
114fd9bbc6STien Hock Loh- interrupt-controller: Mark the device node as an interrupt controller
12*3a21c3acSDinh Nguyen- #interrupt-cells : Should be 2. The interrupt type is fixed in the hardware.
134fd9bbc6STien Hock Loh  - The first cell is the GPIO offset number within the GPIO controller.
14*3a21c3acSDinh Nguyen  - The second cell is the interrupt trigger type and level flags.
154fd9bbc6STien Hock Loh- interrupts: Specify the interrupt.
16df2e9055SMarek Vasut- altr,interrupt-type: Specifies the interrupt trigger type the GPIO
174fd9bbc6STien Hock Loh  hardware is synthesized. This field is required if the Altera GPIO controller
184fd9bbc6STien Hock Loh  used has IRQ enabled as the interrupt type is not software controlled,
194fd9bbc6STien Hock Loh  but hardware synthesized. Required if GPIO is used as an interrupt
204fd9bbc6STien Hock Loh  controller. The value is defined in <dt-bindings/interrupt-controller/irq.h>
214fd9bbc6STien Hock Loh  Only the following flags are supported:
224fd9bbc6STien Hock Loh    IRQ_TYPE_EDGE_RISING
234fd9bbc6STien Hock Loh    IRQ_TYPE_EDGE_FALLING
244fd9bbc6STien Hock Loh    IRQ_TYPE_EDGE_BOTH
254fd9bbc6STien Hock Loh    IRQ_TYPE_LEVEL_HIGH
264fd9bbc6STien Hock Loh
274fd9bbc6STien Hock LohOptional properties:
284fd9bbc6STien Hock Loh- altr,ngpio: Width of the GPIO bank. This defines how many pins the
294fd9bbc6STien Hock Loh  GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
304fd9bbc6STien Hock Loh  specified.
314fd9bbc6STien Hock Loh
324fd9bbc6STien Hock LohExample:
334fd9bbc6STien Hock Loh
344c9847b7SMathieu Malaterregpio_altr: gpio@ff200000 {
354fd9bbc6STien Hock Loh	compatible = "altr,pio-1.0";
364fd9bbc6STien Hock Loh	reg = <0xff200000 0x10>;
374fd9bbc6STien Hock Loh	interrupts = <0 45 4>;
384fd9bbc6STien Hock Loh	altr,ngpio = <32>;
39df2e9055SMarek Vasut	altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
404fd9bbc6STien Hock Loh	#gpio-cells = <2>;
414fd9bbc6STien Hock Loh	gpio-controller;
42*3a21c3acSDinh Nguyen	#interrupt-cells = <2>;
434fd9bbc6STien Hock Loh	interrupt-controller;
444fd9bbc6STien Hock Loh};
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