125388844SThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 225388844SThierry Reding%YAML 1.2 325388844SThierry Reding--- 425388844SThierry Reding$id: http://devicetree.org/schemas/fuse/nvidia,tegra20-fuse.yaml# 525388844SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 625388844SThierry Reding 725388844SThierry Redingtitle: NVIDIA Tegra FUSE block 825388844SThierry Reding 925388844SThierry Redingmaintainers: 1025388844SThierry Reding - Thierry Reding <thierry.reding@gmail.com> 1125388844SThierry Reding - Jon Hunter <jonathanh@nvidia.com> 1225388844SThierry Reding 1325388844SThierry Redingproperties: 1425388844SThierry Reding compatible: 1525388844SThierry Reding oneOf: 1625388844SThierry Reding - enum: 1725388844SThierry Reding - nvidia,tegra20-efuse 1825388844SThierry Reding - nvidia,tegra30-efuse 1925388844SThierry Reding - nvidia,tegra114-efuse 2025388844SThierry Reding - nvidia,tegra124-efuse 2125388844SThierry Reding - nvidia,tegra210-efuse 2225388844SThierry Reding - nvidia,tegra186-efuse 2325388844SThierry Reding - nvidia,tegra194-efuse 24f8dd779bSThierry Reding - nvidia,tegra234-efuse 2525388844SThierry Reding 2625388844SThierry Reding - items: 2725388844SThierry Reding - const: nvidia,tegra132-efuse 2825388844SThierry Reding - const: nvidia,tegra124-efuse 2925388844SThierry Reding 3025388844SThierry Reding reg: 3125388844SThierry Reding maxItems: 1 3225388844SThierry Reding 3325388844SThierry Reding clocks: 3425388844SThierry Reding maxItems: 1 3525388844SThierry Reding 3625388844SThierry Reding clock-names: 3725388844SThierry Reding items: 3825388844SThierry Reding - const: fuse 3925388844SThierry Reding 4025388844SThierry Reding resets: 4125388844SThierry Reding maxItems: 1 4225388844SThierry Reding 4325388844SThierry Reding reset-names: 4425388844SThierry Reding items: 4525388844SThierry Reding - const: fuse 4625388844SThierry Reding 47*21fd06dcSKrzysztof Kozlowski operating-points-v2: true 4825388844SThierry Reding 4925388844SThierry Reding power-domains: 5025388844SThierry Reding items: 5125388844SThierry Reding - description: phandle to the core power domain 5225388844SThierry Reding 5325388844SThierry RedingadditionalProperties: false 5425388844SThierry Reding 5525388844SThierry Redingrequired: 5625388844SThierry Reding - compatible 5725388844SThierry Reding - reg 5825388844SThierry Reding - clocks 5925388844SThierry Reding - clock-names 6025388844SThierry Reding 6125388844SThierry Redingif: 6225388844SThierry Reding properties: 6325388844SThierry Reding compatible: 6425388844SThierry Reding contains: 6525388844SThierry Reding enum: 6625388844SThierry Reding - nvidia,tegra20-efuse 6725388844SThierry Reding - nvidia,tegra30-efuse 6825388844SThierry Reding - nvidia,tegra114-efuse 6925388844SThierry Reding - nvidia,tegra124-efuse 7025388844SThierry Reding - nvidia,tegra132-efuse 7125388844SThierry Reding - nvidia,tegra210-efuse 7225388844SThierry Redingthen: 7325388844SThierry Reding required: 7425388844SThierry Reding - resets 7525388844SThierry Reding - reset-names 7625388844SThierry Reding 7725388844SThierry Redingexamples: 7825388844SThierry Reding - | 7925388844SThierry Reding #include <dt-bindings/clock/tegra20-car.h> 8025388844SThierry Reding 8125388844SThierry Reding fuse@7000f800 { 8225388844SThierry Reding compatible = "nvidia,tegra20-efuse"; 8325388844SThierry Reding reg = <0x7000f800 0x400>; 8425388844SThierry Reding clocks = <&tegra_car TEGRA20_CLK_FUSE>; 8525388844SThierry Reding clock-names = "fuse"; 8625388844SThierry Reding resets = <&tegra_car 39>; 8725388844SThierry Reding reset-names = "fuse"; 8825388844SThierry Reding }; 89