1b7eb6da9SIvan Bornyakov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2b7eb6da9SIvan Bornyakov%YAML 1.2 3b7eb6da9SIvan Bornyakov--- 4b7eb6da9SIvan Bornyakov$id: http://devicetree.org/schemas/fpga/microchip,mpf-spi-fpga-mgr.yaml# 5b7eb6da9SIvan Bornyakov$schema: http://devicetree.org/meta-schemas/core.yaml# 6b7eb6da9SIvan Bornyakov 7b7eb6da9SIvan Bornyakovtitle: Microchip Polarfire FPGA manager. 8b7eb6da9SIvan Bornyakov 9b7eb6da9SIvan Bornyakovmaintainers: 10*9da6225bSIvan Bornyakov - Vladimir Georgiev <v.georgiev@metrotek.ru> 11b7eb6da9SIvan Bornyakov 12b7eb6da9SIvan Bornyakovdescription: 13b7eb6da9SIvan Bornyakov Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to 14b7eb6da9SIvan Bornyakov load the bitstream in .dat format. 15b7eb6da9SIvan Bornyakov 16b7eb6da9SIvan Bornyakovproperties: 17b7eb6da9SIvan Bornyakov compatible: 18b7eb6da9SIvan Bornyakov enum: 19b7eb6da9SIvan Bornyakov - microchip,mpf-spi-fpga-mgr 20b7eb6da9SIvan Bornyakov 21b7eb6da9SIvan Bornyakov reg: 22b7eb6da9SIvan Bornyakov description: SPI chip select 23b7eb6da9SIvan Bornyakov maxItems: 1 24b7eb6da9SIvan Bornyakov 25b7eb6da9SIvan Bornyakovrequired: 26b7eb6da9SIvan Bornyakov - compatible 27b7eb6da9SIvan Bornyakov - reg 28b7eb6da9SIvan Bornyakov 29e167b2c3SKrzysztof KozlowskiallOf: 30e167b2c3SKrzysztof Kozlowski - $ref: /schemas/spi/spi-peripheral-props.yaml# 31e167b2c3SKrzysztof Kozlowski 32e167b2c3SKrzysztof KozlowskiunevaluatedProperties: false 33b7eb6da9SIvan Bornyakov 34b7eb6da9SIvan Bornyakovexamples: 35b7eb6da9SIvan Bornyakov - | 36b7eb6da9SIvan Bornyakov spi { 37b7eb6da9SIvan Bornyakov #address-cells = <1>; 38b7eb6da9SIvan Bornyakov #size-cells = <0>; 39b7eb6da9SIvan Bornyakov 40b7eb6da9SIvan Bornyakov fpga_mgr@0 { 41b7eb6da9SIvan Bornyakov compatible = "microchip,mpf-spi-fpga-mgr"; 42b7eb6da9SIvan Bornyakov spi-max-frequency = <20000000>; 43b7eb6da9SIvan Bornyakov reg = <0>; 44b7eb6da9SIvan Bornyakov }; 45b7eb6da9SIvan Bornyakov }; 46