199370c4eSTinghan Shen# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 299370c4eSTinghan Shen%YAML 1.2 399370c4eSTinghan Shen--- 499370c4eSTinghan Shen$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml# 599370c4eSTinghan Shen$schema: http://devicetree.org/meta-schemas/core.yaml# 699370c4eSTinghan Shen 799370c4eSTinghan Shentitle: MediaTek mt8186 DSP core 899370c4eSTinghan Shen 999370c4eSTinghan Shenmaintainers: 1099370c4eSTinghan Shen - Tinghan Shen <tinghan.shen@mediatek.com> 1199370c4eSTinghan Shen 1299370c4eSTinghan Shendescription: | 1399370c4eSTinghan Shen MediaTek mt8186 SoC contains a DSP core used for 1499370c4eSTinghan Shen advanced pre- and post- audio processing. 1599370c4eSTinghan Shen 1699370c4eSTinghan Shenproperties: 1799370c4eSTinghan Shen compatible: 18*e15ec689STinghan Shen enum: 19*e15ec689STinghan Shen - mediatek,mt8186-dsp 20*e15ec689STinghan Shen - mediatek,mt8188-dsp 2199370c4eSTinghan Shen 2299370c4eSTinghan Shen reg: 2399370c4eSTinghan Shen items: 2499370c4eSTinghan Shen - description: Address and size of the DSP config registers 2599370c4eSTinghan Shen - description: Address and size of the DSP SRAM 2699370c4eSTinghan Shen - description: Address and size of the DSP secure registers 2799370c4eSTinghan Shen - description: Address and size of the DSP bus registers 2899370c4eSTinghan Shen 2999370c4eSTinghan Shen reg-names: 3099370c4eSTinghan Shen items: 3199370c4eSTinghan Shen - const: cfg 3299370c4eSTinghan Shen - const: sram 3399370c4eSTinghan Shen - const: sec 3499370c4eSTinghan Shen - const: bus 3599370c4eSTinghan Shen 3699370c4eSTinghan Shen clocks: 3799370c4eSTinghan Shen items: 3899370c4eSTinghan Shen - description: mux for audio dsp clock 3999370c4eSTinghan Shen - description: mux for audio dsp local bus 4099370c4eSTinghan Shen 4199370c4eSTinghan Shen clock-names: 4299370c4eSTinghan Shen items: 4399370c4eSTinghan Shen - const: audiodsp 4499370c4eSTinghan Shen - const: adsp_bus 4599370c4eSTinghan Shen 4699370c4eSTinghan Shen power-domains: 4799370c4eSTinghan Shen maxItems: 1 4899370c4eSTinghan Shen 4999370c4eSTinghan Shen mboxes: 5099370c4eSTinghan Shen items: 5199370c4eSTinghan Shen - description: mailbox for receiving audio DSP requests. 5299370c4eSTinghan Shen - description: mailbox for transmitting requests to audio DSP. 5399370c4eSTinghan Shen 5499370c4eSTinghan Shen mbox-names: 5599370c4eSTinghan Shen items: 5699370c4eSTinghan Shen - const: rx 5799370c4eSTinghan Shen - const: tx 5899370c4eSTinghan Shen 5999370c4eSTinghan Shen memory-region: 6099370c4eSTinghan Shen items: 6199370c4eSTinghan Shen - description: dma buffer between host and DSP. 6299370c4eSTinghan Shen - description: DSP system memory. 6399370c4eSTinghan Shen 6499370c4eSTinghan Shenrequired: 6599370c4eSTinghan Shen - compatible 6699370c4eSTinghan Shen - reg 6799370c4eSTinghan Shen - reg-names 6899370c4eSTinghan Shen - clocks 6999370c4eSTinghan Shen - clock-names 7099370c4eSTinghan Shen - power-domains 7199370c4eSTinghan Shen - mbox-names 7299370c4eSTinghan Shen - mboxes 7399370c4eSTinghan Shen 7499370c4eSTinghan ShenadditionalProperties: false 7599370c4eSTinghan Shen 7699370c4eSTinghan Shenexamples: 7799370c4eSTinghan Shen - | 7899370c4eSTinghan Shen #include <dt-bindings/clock/mt8186-clk.h> 7999370c4eSTinghan Shen dsp@10680000 { 8099370c4eSTinghan Shen compatible = "mediatek,mt8186-dsp"; 8199370c4eSTinghan Shen reg = <0x10680000 0x2000>, 8299370c4eSTinghan Shen <0x10800000 0x100000>, 8399370c4eSTinghan Shen <0x1068b000 0x100>, 8499370c4eSTinghan Shen <0x1068f000 0x1000>; 8599370c4eSTinghan Shen reg-names = "cfg", "sram", "sec", "bus"; 8699370c4eSTinghan Shen clocks = <&topckgen CLK_TOP_AUDIODSP>, 8799370c4eSTinghan Shen <&topckgen CLK_TOP_ADSP_BUS>; 8899370c4eSTinghan Shen clock-names = "audiodsp", 8999370c4eSTinghan Shen "adsp_bus"; 9099370c4eSTinghan Shen power-domains = <&spm 6>; 9199370c4eSTinghan Shen mbox-names = "rx", "tx"; 9299370c4eSTinghan Shen mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; 9399370c4eSTinghan Shen }; 94