xref: /openbmc/linux/Documentation/devicetree/bindings/dma/owl-dma.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Actions Semi Owl SoCs DMA controller

description: |
  The OWL DMA is a general-purpose direct memory access controller capable of
  supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
  independent DMA channels for the S500 and S900 SoC variants.

maintainers:
  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

allOf:
  - $ref: dma-controller.yaml#

properties:
  compatible:
    enum:
      - actions,s500-dma
      - actions,s700-dma
      - actions,s900-dma

  reg:
    maxItems: 1

  interrupts:
    description:
      controller supports 4 interrupts, which are freely assignable to the
      DMA channels.
    maxItems: 4

  "#dma-cells":
    const: 1

  dma-channels:
    maximum: 12

  dma-requests:
    maximum: 46

  clocks:
    maxItems: 1
    description:
      Phandle and Specifier of the clock feeding the DMA controller.

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - "#dma-cells"
  - dma-channels
  - dma-requests
  - clocks

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    dma: dma-controller@e0260000 {
        compatible = "actions,s900-dma";
        reg = <0xe0260000 0x1000>;
        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
        #dma-cells = <1>;
        dma-channels = <12>;
        dma-requests = <46>;
        clocks = <&clock 22>;
    };

...