115f76096SSameer Pujar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 215f76096SSameer Pujar%YAML 1.2 315f76096SSameer Pujar--- 415f76096SSameer Pujar$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml# 515f76096SSameer Pujar$schema: http://devicetree.org/meta-schemas/core.yaml# 615f76096SSameer Pujar 715f76096SSameer Pujartitle: NVIDIA Tegra Audio DMA (ADMA) controller 815f76096SSameer Pujar 915f76096SSameer Pujardescription: | 1015f76096SSameer Pujar The Tegra Audio DMA controller is used for transferring data 1115f76096SSameer Pujar between system memory and the Audio Processing Engine (APE). 1215f76096SSameer Pujar 1315f76096SSameer Pujarmaintainers: 1415f76096SSameer Pujar - Jon Hunter <jonathanh@nvidia.com> 1515f76096SSameer Pujar 1615f76096SSameer PujarallOf: 1715f76096SSameer Pujar - $ref: "dma-controller.yaml#" 1815f76096SSameer Pujar 1915f76096SSameer Pujarproperties: 2015f76096SSameer Pujar compatible: 2115f76096SSameer Pujar oneOf: 2215f76096SSameer Pujar - enum: 2315f76096SSameer Pujar - nvidia,tegra210-adma 2415f76096SSameer Pujar - nvidia,tegra186-adma 2515f76096SSameer Pujar - items: 26*fed44d6cSSameer Pujar - enum: 27*fed44d6cSSameer Pujar - nvidia,tegra234-adma 28*fed44d6cSSameer Pujar - nvidia,tegra194-adma 2915f76096SSameer Pujar - const: nvidia,tegra186-adma 3015f76096SSameer Pujar 3115f76096SSameer Pujar reg: 3215f76096SSameer Pujar maxItems: 1 3315f76096SSameer Pujar 3415f76096SSameer Pujar interrupts: 3515f76096SSameer Pujar description: | 3615f76096SSameer Pujar Should contain all of the per-channel DMA interrupts in 3715f76096SSameer Pujar ascending order with respect to the DMA channel index. 3815f76096SSameer Pujar minItems: 1 3915f76096SSameer Pujar maxItems: 32 4015f76096SSameer Pujar 4115f76096SSameer Pujar clocks: 4215f76096SSameer Pujar description: Must contain one entry for the ADMA module clock 4315f76096SSameer Pujar maxItems: 1 4415f76096SSameer Pujar 4515f76096SSameer Pujar clock-names: 4615f76096SSameer Pujar const: d_audio 4715f76096SSameer Pujar 4815f76096SSameer Pujar "#dma-cells": 4915f76096SSameer Pujar description: | 5015f76096SSameer Pujar The first cell denotes the receive/transmit request number and 5115f76096SSameer Pujar should be between 1 and the maximum number of requests supported. 5215f76096SSameer Pujar This value corresponds to the RX/TX_REQUEST_SELECT fields in the 5315f76096SSameer Pujar ADMA_CHn_CTRL register. 5415f76096SSameer Pujar const: 1 5515f76096SSameer Pujar 5615f76096SSameer Pujarrequired: 5715f76096SSameer Pujar - compatible 5815f76096SSameer Pujar - reg 5915f76096SSameer Pujar - interrupts 6015f76096SSameer Pujar - clocks 6115f76096SSameer Pujar - clock-names 6215f76096SSameer Pujar 6315f76096SSameer PujaradditionalProperties: false 6415f76096SSameer Pujar 6515f76096SSameer Pujarexamples: 6615f76096SSameer Pujar - | 6715f76096SSameer Pujar #include <dt-bindings/interrupt-controller/arm-gic.h> 6815f76096SSameer Pujar #include<dt-bindings/clock/tegra210-car.h> 6915f76096SSameer Pujar 7015f76096SSameer Pujar dma-controller@702e2000 { 7115f76096SSameer Pujar compatible = "nvidia,tegra210-adma"; 7215f76096SSameer Pujar reg = <0x702e2000 0x2000>; 7315f76096SSameer Pujar interrupt-parent = <&tegra_agic>; 7415f76096SSameer Pujar interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 7515f76096SSameer Pujar <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 7615f76096SSameer Pujar <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 7715f76096SSameer Pujar <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 7815f76096SSameer Pujar <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 7915f76096SSameer Pujar <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 8015f76096SSameer Pujar <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 8115f76096SSameer Pujar <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 8215f76096SSameer Pujar <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 8315f76096SSameer Pujar <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 8415f76096SSameer Pujar <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 8515f76096SSameer Pujar <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 8615f76096SSameer Pujar <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 8715f76096SSameer Pujar <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 8815f76096SSameer Pujar <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 8915f76096SSameer Pujar <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 9015f76096SSameer Pujar <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 9115f76096SSameer Pujar <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 9215f76096SSameer Pujar <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 9315f76096SSameer Pujar <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 9415f76096SSameer Pujar <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 9515f76096SSameer Pujar <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 9615f76096SSameer Pujar clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 9715f76096SSameer Pujar clock-names = "d_audio"; 9815f76096SSameer Pujar #dma-cells = <1>; 9915f76096SSameer Pujar }; 10015f76096SSameer Pujar 10115f76096SSameer Pujar... 102