1*15f76096SSameer Pujar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*15f76096SSameer Pujar%YAML 1.2 3*15f76096SSameer Pujar--- 4*15f76096SSameer Pujar$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml# 5*15f76096SSameer Pujar$schema: http://devicetree.org/meta-schemas/core.yaml# 6*15f76096SSameer Pujar 7*15f76096SSameer Pujartitle: NVIDIA Tegra Audio DMA (ADMA) controller 8*15f76096SSameer Pujar 9*15f76096SSameer Pujardescription: | 10*15f76096SSameer Pujar The Tegra Audio DMA controller is used for transferring data 11*15f76096SSameer Pujar between system memory and the Audio Processing Engine (APE). 12*15f76096SSameer Pujar 13*15f76096SSameer Pujarmaintainers: 14*15f76096SSameer Pujar - Jon Hunter <jonathanh@nvidia.com> 15*15f76096SSameer Pujar 16*15f76096SSameer PujarallOf: 17*15f76096SSameer Pujar - $ref: "dma-controller.yaml#" 18*15f76096SSameer Pujar 19*15f76096SSameer Pujarproperties: 20*15f76096SSameer Pujar compatible: 21*15f76096SSameer Pujar oneOf: 22*15f76096SSameer Pujar - enum: 23*15f76096SSameer Pujar - nvidia,tegra210-adma 24*15f76096SSameer Pujar - nvidia,tegra186-adma 25*15f76096SSameer Pujar - items: 26*15f76096SSameer Pujar - const: nvidia,tegra194-adma 27*15f76096SSameer Pujar - const: nvidia,tegra186-adma 28*15f76096SSameer Pujar 29*15f76096SSameer Pujar reg: 30*15f76096SSameer Pujar maxItems: 1 31*15f76096SSameer Pujar 32*15f76096SSameer Pujar interrupts: 33*15f76096SSameer Pujar description: | 34*15f76096SSameer Pujar Should contain all of the per-channel DMA interrupts in 35*15f76096SSameer Pujar ascending order with respect to the DMA channel index. 36*15f76096SSameer Pujar minItems: 1 37*15f76096SSameer Pujar maxItems: 32 38*15f76096SSameer Pujar 39*15f76096SSameer Pujar clocks: 40*15f76096SSameer Pujar description: Must contain one entry for the ADMA module clock 41*15f76096SSameer Pujar maxItems: 1 42*15f76096SSameer Pujar 43*15f76096SSameer Pujar clock-names: 44*15f76096SSameer Pujar const: d_audio 45*15f76096SSameer Pujar 46*15f76096SSameer Pujar "#dma-cells": 47*15f76096SSameer Pujar description: | 48*15f76096SSameer Pujar The first cell denotes the receive/transmit request number and 49*15f76096SSameer Pujar should be between 1 and the maximum number of requests supported. 50*15f76096SSameer Pujar This value corresponds to the RX/TX_REQUEST_SELECT fields in the 51*15f76096SSameer Pujar ADMA_CHn_CTRL register. 52*15f76096SSameer Pujar const: 1 53*15f76096SSameer Pujar 54*15f76096SSameer Pujarrequired: 55*15f76096SSameer Pujar - compatible 56*15f76096SSameer Pujar - reg 57*15f76096SSameer Pujar - interrupts 58*15f76096SSameer Pujar - clocks 59*15f76096SSameer Pujar - clock-names 60*15f76096SSameer Pujar 61*15f76096SSameer PujaradditionalProperties: false 62*15f76096SSameer Pujar 63*15f76096SSameer Pujarexamples: 64*15f76096SSameer Pujar - | 65*15f76096SSameer Pujar #include <dt-bindings/interrupt-controller/arm-gic.h> 66*15f76096SSameer Pujar #include<dt-bindings/clock/tegra210-car.h> 67*15f76096SSameer Pujar 68*15f76096SSameer Pujar dma-controller@702e2000 { 69*15f76096SSameer Pujar compatible = "nvidia,tegra210-adma"; 70*15f76096SSameer Pujar reg = <0x702e2000 0x2000>; 71*15f76096SSameer Pujar interrupt-parent = <&tegra_agic>; 72*15f76096SSameer Pujar interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 73*15f76096SSameer Pujar <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 74*15f76096SSameer Pujar <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 75*15f76096SSameer Pujar <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 76*15f76096SSameer Pujar <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 77*15f76096SSameer Pujar <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 78*15f76096SSameer Pujar <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 79*15f76096SSameer Pujar <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 80*15f76096SSameer Pujar <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 81*15f76096SSameer Pujar <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 82*15f76096SSameer Pujar <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 83*15f76096SSameer Pujar <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 84*15f76096SSameer Pujar <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 85*15f76096SSameer Pujar <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 86*15f76096SSameer Pujar <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 87*15f76096SSameer Pujar <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 88*15f76096SSameer Pujar <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 89*15f76096SSameer Pujar <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 90*15f76096SSameer Pujar <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 91*15f76096SSameer Pujar <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 92*15f76096SSameer Pujar <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 93*15f76096SSameer Pujar <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 94*15f76096SSameer Pujar clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 95*15f76096SSameer Pujar clock-names = "d_audio"; 96*15f76096SSameer Pujar #dma-cells = <1>; 97*15f76096SSameer Pujar }; 98*15f76096SSameer Pujar 99*15f76096SSameer Pujar... 100