1afd4df85SAmireddy Mallikarjuna reddy# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2afd4df85SAmireddy Mallikarjuna reddy%YAML 1.2 3afd4df85SAmireddy Mallikarjuna reddy--- 4afd4df85SAmireddy Mallikarjuna reddy$id: http://devicetree.org/schemas/dma/intel,ldma.yaml# 5afd4df85SAmireddy Mallikarjuna reddy$schema: http://devicetree.org/meta-schemas/core.yaml# 6afd4df85SAmireddy Mallikarjuna reddy 7afd4df85SAmireddy Mallikarjuna reddytitle: Lightning Mountain centralized DMA controllers. 8afd4df85SAmireddy Mallikarjuna reddy 9afd4df85SAmireddy Mallikarjuna reddymaintainers: 10afd4df85SAmireddy Mallikarjuna reddy - chuanhua.lei@intel.com 11afd4df85SAmireddy Mallikarjuna reddy - mallikarjunax.reddy@intel.com 12afd4df85SAmireddy Mallikarjuna reddy 13afd4df85SAmireddy Mallikarjuna reddyallOf: 14*10cafa2dSKrzysztof Kozlowski - $ref: dma-controller.yaml# 15afd4df85SAmireddy Mallikarjuna reddy 16afd4df85SAmireddy Mallikarjuna reddyproperties: 17afd4df85SAmireddy Mallikarjuna reddy compatible: 18afd4df85SAmireddy Mallikarjuna reddy enum: 19afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-cdma 20afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-dma2tx 21afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-dma1rx 22afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-dma1tx 23afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-dma0tx 24afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-dma3 25afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-toe-dma30 26afd4df85SAmireddy Mallikarjuna reddy - intel,lgm-toe-dma31 27afd4df85SAmireddy Mallikarjuna reddy 28afd4df85SAmireddy Mallikarjuna reddy reg: 29afd4df85SAmireddy Mallikarjuna reddy maxItems: 1 30afd4df85SAmireddy Mallikarjuna reddy 31afd4df85SAmireddy Mallikarjuna reddy "#dma-cells": 32afd4df85SAmireddy Mallikarjuna reddy const: 3 33afd4df85SAmireddy Mallikarjuna reddy description: 34afd4df85SAmireddy Mallikarjuna reddy The first cell is the peripheral's DMA request line. 35afd4df85SAmireddy Mallikarjuna reddy The second cell is the peripheral's (port) number corresponding to the channel. 36afd4df85SAmireddy Mallikarjuna reddy The third cell is the burst length of the channel. 37afd4df85SAmireddy Mallikarjuna reddy 38afd4df85SAmireddy Mallikarjuna reddy dma-channels: 39afd4df85SAmireddy Mallikarjuna reddy minimum: 1 40afd4df85SAmireddy Mallikarjuna reddy maximum: 16 41afd4df85SAmireddy Mallikarjuna reddy 42afd4df85SAmireddy Mallikarjuna reddy dma-channel-mask: 43afd4df85SAmireddy Mallikarjuna reddy maxItems: 1 44afd4df85SAmireddy Mallikarjuna reddy 45afd4df85SAmireddy Mallikarjuna reddy clocks: 46afd4df85SAmireddy Mallikarjuna reddy maxItems: 1 47afd4df85SAmireddy Mallikarjuna reddy 48afd4df85SAmireddy Mallikarjuna reddy resets: 49afd4df85SAmireddy Mallikarjuna reddy maxItems: 1 50afd4df85SAmireddy Mallikarjuna reddy 51afd4df85SAmireddy Mallikarjuna reddy reset-names: 52afd4df85SAmireddy Mallikarjuna reddy items: 53afd4df85SAmireddy Mallikarjuna reddy - const: ctrl 54afd4df85SAmireddy Mallikarjuna reddy 55afd4df85SAmireddy Mallikarjuna reddy interrupts: 56afd4df85SAmireddy Mallikarjuna reddy maxItems: 1 57afd4df85SAmireddy Mallikarjuna reddy 58afd4df85SAmireddy Mallikarjuna reddy intel,dma-poll-cnt: 59be7ccfa6SBjorn Andersson $ref: /schemas/types.yaml#/definitions/uint32 60afd4df85SAmireddy Mallikarjuna reddy description: 61afd4df85SAmireddy Mallikarjuna reddy DMA descriptor polling counter is used to control the poling mechanism 62afd4df85SAmireddy Mallikarjuna reddy for the descriptor fetching for all channels. 63afd4df85SAmireddy Mallikarjuna reddy 64afd4df85SAmireddy Mallikarjuna reddy intel,dma-byte-en: 65afd4df85SAmireddy Mallikarjuna reddy type: boolean 66afd4df85SAmireddy Mallikarjuna reddy description: 67afd4df85SAmireddy Mallikarjuna reddy DMA byte enable is only valid for DMA write(RX). 68afd4df85SAmireddy Mallikarjuna reddy Byte enable(1) means DMA write will be based on the number of dwords 69afd4df85SAmireddy Mallikarjuna reddy instead of the whole burst. 70afd4df85SAmireddy Mallikarjuna reddy 71afd4df85SAmireddy Mallikarjuna reddy intel,dma-drb: 72afd4df85SAmireddy Mallikarjuna reddy type: boolean 73afd4df85SAmireddy Mallikarjuna reddy description: 74afd4df85SAmireddy Mallikarjuna reddy DMA descriptor read back to make sure data and desc synchronization. 75afd4df85SAmireddy Mallikarjuna reddy 76afd4df85SAmireddy Mallikarjuna reddy intel,dma-dburst-wr: 77afd4df85SAmireddy Mallikarjuna reddy type: boolean 78afd4df85SAmireddy Mallikarjuna reddy description: 79afd4df85SAmireddy Mallikarjuna reddy Enable RX dynamic burst write. When it is enabled, the DMA does RX dynamic burst; 80afd4df85SAmireddy Mallikarjuna reddy if it is disabled, the DMA RX will still support programmable fixed burst size of 2,4,8,16. 81afd4df85SAmireddy Mallikarjuna reddy It only applies to RX DMA and memcopy DMA. 82afd4df85SAmireddy Mallikarjuna reddy 83afd4df85SAmireddy Mallikarjuna reddyrequired: 84afd4df85SAmireddy Mallikarjuna reddy - compatible 85afd4df85SAmireddy Mallikarjuna reddy - reg 86afd4df85SAmireddy Mallikarjuna reddy 87afd4df85SAmireddy Mallikarjuna reddyadditionalProperties: false 88afd4df85SAmireddy Mallikarjuna reddy 89afd4df85SAmireddy Mallikarjuna reddyexamples: 90afd4df85SAmireddy Mallikarjuna reddy - | 91afd4df85SAmireddy Mallikarjuna reddy dma0: dma-controller@e0e00000 { 92afd4df85SAmireddy Mallikarjuna reddy compatible = "intel,lgm-cdma"; 93afd4df85SAmireddy Mallikarjuna reddy reg = <0xe0e00000 0x1000>; 94afd4df85SAmireddy Mallikarjuna reddy #dma-cells = <3>; 95afd4df85SAmireddy Mallikarjuna reddy dma-channels = <16>; 96afd4df85SAmireddy Mallikarjuna reddy dma-channel-mask = <0xFFFF>; 97afd4df85SAmireddy Mallikarjuna reddy interrupt-parent = <&ioapic1>; 98afd4df85SAmireddy Mallikarjuna reddy interrupts = <82 1>; 99afd4df85SAmireddy Mallikarjuna reddy resets = <&rcu0 0x30 0>; 100afd4df85SAmireddy Mallikarjuna reddy reset-names = "ctrl"; 101afd4df85SAmireddy Mallikarjuna reddy clocks = <&cgu0 80>; 102afd4df85SAmireddy Mallikarjuna reddy intel,dma-poll-cnt = <4>; 103afd4df85SAmireddy Mallikarjuna reddy intel,dma-byte-en; 104afd4df85SAmireddy Mallikarjuna reddy intel,dma-drb; 105afd4df85SAmireddy Mallikarjuna reddy }; 106afd4df85SAmireddy Mallikarjuna reddy - | 107afd4df85SAmireddy Mallikarjuna reddy dma3: dma-controller@ec800000 { 108afd4df85SAmireddy Mallikarjuna reddy compatible = "intel,lgm-dma3"; 109afd4df85SAmireddy Mallikarjuna reddy reg = <0xec800000 0x1000>; 110afd4df85SAmireddy Mallikarjuna reddy clocks = <&cgu0 71>; 111afd4df85SAmireddy Mallikarjuna reddy resets = <&rcu0 0x10 9>; 112afd4df85SAmireddy Mallikarjuna reddy #dma-cells = <3>; 113afd4df85SAmireddy Mallikarjuna reddy intel,dma-poll-cnt = <16>; 114afd4df85SAmireddy Mallikarjuna reddy intel,dma-byte-en; 115afd4df85SAmireddy Mallikarjuna reddy intel,dma-dburst-wr; 116afd4df85SAmireddy Mallikarjuna reddy }; 117