1c5115953SNicolas Ferre* Atmel Direct Memory Access Controller (DMA) 2c5115953SNicolas Ferre 3c5115953SNicolas FerreRequired properties: 4bbe89c8eSLudovic Desroches- compatible: Should be "atmel,<chip>-dma". 5bbe89c8eSLudovic Desroches- reg: Should contain DMA registers location and length. 6bbe89c8eSLudovic Desroches- interrupts: Should contain DMA interrupt. 7bbe89c8eSLudovic Desroches- #dma-cells: Must be <2>, used to represent the number of integer cells in 8bbe89c8eSLudovic Desrochesthe dmas property of client devices. 9c5115953SNicolas Ferre 10bbe89c8eSLudovic DesrochesExample: 11c5115953SNicolas Ferre 12bbe89c8eSLudovic Desrochesdma0: dma@ffffec00 { 13c5115953SNicolas Ferre compatible = "atmel,at91sam9g45-dma"; 14c5115953SNicolas Ferre reg = <0xffffec00 0x200>; 15c5115953SNicolas Ferre interrupts = <21>; 16bbe89c8eSLudovic Desroches #dma-cells = <2>; 17bbe89c8eSLudovic Desroches}; 18bbe89c8eSLudovic Desroches 19bbe89c8eSLudovic DesrochesDMA clients connected to the Atmel DMA controller must use the format 20bbe89c8eSLudovic Desrochesdescribed in the dma.txt file, using a three-cell specifier for each channel: 21bbe89c8eSLudovic Desrochesa phandle plus two interger cells. 22bbe89c8eSLudovic DesrochesThe three cells in order are: 23bbe89c8eSLudovic Desroches 24bbe89c8eSLudovic Desroches1. A phandle pointing to the DMA controller. 25bbe89c8eSLudovic Desroches2. The memory interface (16 most significant bits), the peripheral interface 26bbe89c8eSLudovic Desroches(16 less significant bits). 27*62971b29SLudovic Desroches3. Parameters for the at91 DMA configuration register which are device 28*62971b29SLudovic Desrochesdependant: 29*62971b29SLudovic Desroches - bit 7-0: peripheral identifier for the hardware handshaking interface. The 30bbe89c8eSLudovic Desroches identifier can be different for tx and rx. 31*62971b29SLudovic Desroches - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP. 32bbe89c8eSLudovic Desroches 33bbe89c8eSLudovic DesrochesExample: 34bbe89c8eSLudovic Desroches 35bbe89c8eSLudovic Desrochesi2c0@i2c@f8010000 { 36bbe89c8eSLudovic Desroches compatible = "atmel,at91sam9x5-i2c"; 37bbe89c8eSLudovic Desroches reg = <0xf8010000 0x100>; 38bbe89c8eSLudovic Desroches interrupts = <9 4 6>; 39bbe89c8eSLudovic Desroches dmas = <&dma0 1 7>, 40bbe89c8eSLudovic Desroches <&dma0 1 8>; 41bbe89c8eSLudovic Desroches dma-names = "tx", "rx"; 42c5115953SNicolas Ferre}; 43