xref: /openbmc/linux/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml (revision fe8b45aa61153f44a2e4851b021fda0b8bc94fb9)
1*fe8b45aaSThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*fe8b45aaSThierry Reding%YAML 1.2
3*fe8b45aaSThierry Reding---
4*fe8b45aaSThierry Reding$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml#
5*fe8b45aaSThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml#
6*fe8b45aaSThierry Reding
7*fe8b45aaSThierry Redingtitle: NVIDIA 3D graphics engine
8*fe8b45aaSThierry Reding
9*fe8b45aaSThierry Redingmaintainers:
10*fe8b45aaSThierry Reding  - Thierry Reding <thierry.reding@gmail.com>
11*fe8b45aaSThierry Reding  - Jon Hunter <jonathanh@nvidia.com>
12*fe8b45aaSThierry Reding
13*fe8b45aaSThierry Redingproperties:
14*fe8b45aaSThierry Reding  $nodename:
15*fe8b45aaSThierry Reding    pattern: "^gr3d@[0-9a-f]+$"
16*fe8b45aaSThierry Reding
17*fe8b45aaSThierry Reding  compatible:
18*fe8b45aaSThierry Reding    enum:
19*fe8b45aaSThierry Reding      - nvidia,tegra20-gr3d
20*fe8b45aaSThierry Reding      - nvidia,tegra30-gr3d
21*fe8b45aaSThierry Reding      - nvidia,tegra114-gr3d
22*fe8b45aaSThierry Reding
23*fe8b45aaSThierry Reding  reg:
24*fe8b45aaSThierry Reding    maxItems: 1
25*fe8b45aaSThierry Reding
26*fe8b45aaSThierry Reding  clocks:
27*fe8b45aaSThierry Reding    minItems: 1
28*fe8b45aaSThierry Reding    maxItems: 2
29*fe8b45aaSThierry Reding
30*fe8b45aaSThierry Reding  clock-names:
31*fe8b45aaSThierry Reding    minItems: 1
32*fe8b45aaSThierry Reding    maxItems: 2
33*fe8b45aaSThierry Reding
34*fe8b45aaSThierry Reding  resets:
35*fe8b45aaSThierry Reding    minItems: 2
36*fe8b45aaSThierry Reding    maxItems: 4
37*fe8b45aaSThierry Reding
38*fe8b45aaSThierry Reding  reset-names:
39*fe8b45aaSThierry Reding    minItems: 2
40*fe8b45aaSThierry Reding    maxItems: 4
41*fe8b45aaSThierry Reding
42*fe8b45aaSThierry Reding  iommus:
43*fe8b45aaSThierry Reding    minItems: 1
44*fe8b45aaSThierry Reding    maxItems: 2
45*fe8b45aaSThierry Reding
46*fe8b45aaSThierry Reding  interconnects:
47*fe8b45aaSThierry Reding    minItems: 4
48*fe8b45aaSThierry Reding    maxItems: 10
49*fe8b45aaSThierry Reding
50*fe8b45aaSThierry Reding  interconnect-names:
51*fe8b45aaSThierry Reding    minItems: 4
52*fe8b45aaSThierry Reding    maxItems: 10
53*fe8b45aaSThierry Reding
54*fe8b45aaSThierry Reding  operating-points-v2:
55*fe8b45aaSThierry Reding    $ref: "/schemas/types.yaml#/definitions/phandle"
56*fe8b45aaSThierry Reding
57*fe8b45aaSThierry Reding  power-domains:
58*fe8b45aaSThierry Reding    minItems: 1
59*fe8b45aaSThierry Reding    maxItems: 2
60*fe8b45aaSThierry Reding
61*fe8b45aaSThierry Reding  power-domain-names:
62*fe8b45aaSThierry Reding    minItems: 2
63*fe8b45aaSThierry Reding    maxItems: 2
64*fe8b45aaSThierry Reding
65*fe8b45aaSThierry RedingallOf:
66*fe8b45aaSThierry Reding  - if:
67*fe8b45aaSThierry Reding      properties:
68*fe8b45aaSThierry Reding        compatible:
69*fe8b45aaSThierry Reding          contains:
70*fe8b45aaSThierry Reding            const: nvidia,tegra20-gr2d
71*fe8b45aaSThierry Reding    then:
72*fe8b45aaSThierry Reding      properties:
73*fe8b45aaSThierry Reding        clocks:
74*fe8b45aaSThierry Reding          items:
75*fe8b45aaSThierry Reding            - description: module clock
76*fe8b45aaSThierry Reding
77*fe8b45aaSThierry Reding        clock-names:
78*fe8b45aaSThierry Reding          items:
79*fe8b45aaSThierry Reding            - const: 3d
80*fe8b45aaSThierry Reding
81*fe8b45aaSThierry Reding        resets:
82*fe8b45aaSThierry Reding          items:
83*fe8b45aaSThierry Reding            - description: module reset
84*fe8b45aaSThierry Reding            - description: memory client hotflush reset
85*fe8b45aaSThierry Reding
86*fe8b45aaSThierry Reding        reset-names:
87*fe8b45aaSThierry Reding          items:
88*fe8b45aaSThierry Reding            - const: 3d
89*fe8b45aaSThierry Reding            - const: mc
90*fe8b45aaSThierry Reding
91*fe8b45aaSThierry Reding        iommus:
92*fe8b45aaSThierry Reding          maxItems: 1
93*fe8b45aaSThierry Reding
94*fe8b45aaSThierry Reding        interconnects:
95*fe8b45aaSThierry Reding          minItems: 4
96*fe8b45aaSThierry Reding          maxItems: 4
97*fe8b45aaSThierry Reding
98*fe8b45aaSThierry Reding        interconnect-names:
99*fe8b45aaSThierry Reding          minItems: 4
100*fe8b45aaSThierry Reding          maxItems: 4
101*fe8b45aaSThierry Reding
102*fe8b45aaSThierry Reding        power-domains:
103*fe8b45aaSThierry Reding          items:
104*fe8b45aaSThierry Reding            - description: phandle to the TD power domain
105*fe8b45aaSThierry Reding
106*fe8b45aaSThierry Reding  - if:
107*fe8b45aaSThierry Reding      properties:
108*fe8b45aaSThierry Reding        compatible:
109*fe8b45aaSThierry Reding          contains:
110*fe8b45aaSThierry Reding            const: nvidia,tegra30-gr3d
111*fe8b45aaSThierry Reding    then:
112*fe8b45aaSThierry Reding      properties:
113*fe8b45aaSThierry Reding        clocks:
114*fe8b45aaSThierry Reding          items:
115*fe8b45aaSThierry Reding            - description: primary module clock
116*fe8b45aaSThierry Reding            - description: secondary module clock
117*fe8b45aaSThierry Reding
118*fe8b45aaSThierry Reding        clock-names:
119*fe8b45aaSThierry Reding          items:
120*fe8b45aaSThierry Reding            - const: 3d
121*fe8b45aaSThierry Reding            - const: 3d2
122*fe8b45aaSThierry Reding
123*fe8b45aaSThierry Reding        resets:
124*fe8b45aaSThierry Reding          items:
125*fe8b45aaSThierry Reding            - description: primary module reset
126*fe8b45aaSThierry Reding            - description: secondary module reset
127*fe8b45aaSThierry Reding            - description: primary memory client hotflush reset
128*fe8b45aaSThierry Reding            - description: secondary memory client hotflush reset
129*fe8b45aaSThierry Reding
130*fe8b45aaSThierry Reding        reset-names:
131*fe8b45aaSThierry Reding          items:
132*fe8b45aaSThierry Reding            - const: 3d
133*fe8b45aaSThierry Reding            - const: 3d2
134*fe8b45aaSThierry Reding            - const: mc
135*fe8b45aaSThierry Reding            - const: mc2
136*fe8b45aaSThierry Reding
137*fe8b45aaSThierry Reding        iommus:
138*fe8b45aaSThierry Reding          minItems: 2
139*fe8b45aaSThierry Reding          maxItems: 2
140*fe8b45aaSThierry Reding
141*fe8b45aaSThierry Reding        interconnects:
142*fe8b45aaSThierry Reding          minItems: 8
143*fe8b45aaSThierry Reding          maxItems: 8
144*fe8b45aaSThierry Reding
145*fe8b45aaSThierry Reding        interconnect-names:
146*fe8b45aaSThierry Reding          minItems: 8
147*fe8b45aaSThierry Reding          maxItems: 8
148*fe8b45aaSThierry Reding
149*fe8b45aaSThierry Reding        power-domains:
150*fe8b45aaSThierry Reding          items:
151*fe8b45aaSThierry Reding            - description: phandle to the TD power domain
152*fe8b45aaSThierry Reding            - description: phandle to the TD2 power domain
153*fe8b45aaSThierry Reding
154*fe8b45aaSThierry Reding        power-domain-names:
155*fe8b45aaSThierry Reding          items:
156*fe8b45aaSThierry Reding            - const: 3d0
157*fe8b45aaSThierry Reding            - const: 3d1
158*fe8b45aaSThierry Reding
159*fe8b45aaSThierry Reding      dependencies:
160*fe8b45aaSThierry Reding        power-domains: [ power-domain-names ]
161*fe8b45aaSThierry Reding
162*fe8b45aaSThierry Reding  - if:
163*fe8b45aaSThierry Reding      properties:
164*fe8b45aaSThierry Reding        compatible:
165*fe8b45aaSThierry Reding          contains:
166*fe8b45aaSThierry Reding            const: nvidia,tegra114-gr2d
167*fe8b45aaSThierry Reding    then:
168*fe8b45aaSThierry Reding      properties:
169*fe8b45aaSThierry Reding        clocks:
170*fe8b45aaSThierry Reding          items:
171*fe8b45aaSThierry Reding            - description: module clock
172*fe8b45aaSThierry Reding
173*fe8b45aaSThierry Reding        clock-names:
174*fe8b45aaSThierry Reding          items:
175*fe8b45aaSThierry Reding            - const: 3d
176*fe8b45aaSThierry Reding
177*fe8b45aaSThierry Reding        resets:
178*fe8b45aaSThierry Reding          items:
179*fe8b45aaSThierry Reding            - description: module reset
180*fe8b45aaSThierry Reding            - description: memory client hotflush reset
181*fe8b45aaSThierry Reding
182*fe8b45aaSThierry Reding        reset-names:
183*fe8b45aaSThierry Reding          items:
184*fe8b45aaSThierry Reding            - const: 3d
185*fe8b45aaSThierry Reding            - const: mc
186*fe8b45aaSThierry Reding
187*fe8b45aaSThierry Reding        iommus:
188*fe8b45aaSThierry Reding          maxItems: 1
189*fe8b45aaSThierry Reding
190*fe8b45aaSThierry Reding        interconnects:
191*fe8b45aaSThierry Reding          minItems: 10
192*fe8b45aaSThierry Reding          maxItems: 10
193*fe8b45aaSThierry Reding
194*fe8b45aaSThierry Reding        interconnect-names:
195*fe8b45aaSThierry Reding          minItems: 10
196*fe8b45aaSThierry Reding          maxItems: 10
197*fe8b45aaSThierry Reding
198*fe8b45aaSThierry Reding        power-domains:
199*fe8b45aaSThierry Reding          items:
200*fe8b45aaSThierry Reding            - description: phandle to the TD power domain
201*fe8b45aaSThierry Reding
202*fe8b45aaSThierry RedingadditionalProperties: false
203*fe8b45aaSThierry Reding
204*fe8b45aaSThierry Redingexamples:
205*fe8b45aaSThierry Reding  - |
206*fe8b45aaSThierry Reding    #include <dt-bindings/clock/tegra20-car.h>
207*fe8b45aaSThierry Reding    #include <dt-bindings/memory/tegra20-mc.h>
208*fe8b45aaSThierry Reding
209*fe8b45aaSThierry Reding    gr3d@54180000 {
210*fe8b45aaSThierry Reding        compatible = "nvidia,tegra20-gr3d";
211*fe8b45aaSThierry Reding        reg = <0x54180000 0x00040000>;
212*fe8b45aaSThierry Reding        clocks = <&tegra_car TEGRA20_CLK_GR3D>;
213*fe8b45aaSThierry Reding        resets = <&tegra_car 24>, <&mc TEGRA20_MC_RESET_3D>;
214*fe8b45aaSThierry Reding        reset-names = "3d", "mc";
215*fe8b45aaSThierry Reding    };
216