xref: /openbmc/linux/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1fe8b45aaSThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2fe8b45aaSThierry Reding%YAML 1.2
3fe8b45aaSThierry Reding---
4fe8b45aaSThierry Reding$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml#
5fe8b45aaSThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml#
6fe8b45aaSThierry Reding
7fe8b45aaSThierry Redingtitle: NVIDIA 3D graphics engine
8fe8b45aaSThierry Reding
9fe8b45aaSThierry Redingmaintainers:
10fe8b45aaSThierry Reding  - Thierry Reding <thierry.reding@gmail.com>
11fe8b45aaSThierry Reding  - Jon Hunter <jonathanh@nvidia.com>
12fe8b45aaSThierry Reding
13fe8b45aaSThierry Redingproperties:
14fe8b45aaSThierry Reding  $nodename:
15fe8b45aaSThierry Reding    pattern: "^gr3d@[0-9a-f]+$"
16fe8b45aaSThierry Reding
17fe8b45aaSThierry Reding  compatible:
18fe8b45aaSThierry Reding    enum:
19fe8b45aaSThierry Reding      - nvidia,tegra20-gr3d
20fe8b45aaSThierry Reding      - nvidia,tegra30-gr3d
21fe8b45aaSThierry Reding      - nvidia,tegra114-gr3d
22fe8b45aaSThierry Reding
23fe8b45aaSThierry Reding  reg:
24fe8b45aaSThierry Reding    maxItems: 1
25fe8b45aaSThierry Reding
26fe8b45aaSThierry Reding  clocks:
27fe8b45aaSThierry Reding    minItems: 1
28fe8b45aaSThierry Reding    maxItems: 2
29fe8b45aaSThierry Reding
30fe8b45aaSThierry Reding  clock-names:
31fe8b45aaSThierry Reding    minItems: 1
32fe8b45aaSThierry Reding    maxItems: 2
33fe8b45aaSThierry Reding
34fe8b45aaSThierry Reding  resets:
35fe8b45aaSThierry Reding    minItems: 2
36fe8b45aaSThierry Reding    maxItems: 4
37fe8b45aaSThierry Reding
38fe8b45aaSThierry Reding  reset-names:
39fe8b45aaSThierry Reding    minItems: 2
40fe8b45aaSThierry Reding    maxItems: 4
41fe8b45aaSThierry Reding
42fe8b45aaSThierry Reding  iommus:
43fe8b45aaSThierry Reding    minItems: 1
44fe8b45aaSThierry Reding    maxItems: 2
45fe8b45aaSThierry Reding
46fe8b45aaSThierry Reding  interconnects:
47fe8b45aaSThierry Reding    minItems: 4
48fe8b45aaSThierry Reding    maxItems: 10
49fe8b45aaSThierry Reding
50fe8b45aaSThierry Reding  interconnect-names:
51fe8b45aaSThierry Reding    minItems: 4
52fe8b45aaSThierry Reding    maxItems: 10
53fe8b45aaSThierry Reding
54*21fd06dcSKrzysztof Kozlowski  operating-points-v2: true
55fe8b45aaSThierry Reding
56fe8b45aaSThierry Reding  power-domains:
57fe8b45aaSThierry Reding    minItems: 1
58fe8b45aaSThierry Reding    maxItems: 2
59fe8b45aaSThierry Reding
60fe8b45aaSThierry Reding  power-domain-names:
61fe8b45aaSThierry Reding    maxItems: 2
62fe8b45aaSThierry Reding
63fe8b45aaSThierry RedingallOf:
64fe8b45aaSThierry Reding  - if:
65fe8b45aaSThierry Reding      properties:
66fe8b45aaSThierry Reding        compatible:
67fe8b45aaSThierry Reding          contains:
68fe8b45aaSThierry Reding            const: nvidia,tegra20-gr2d
69fe8b45aaSThierry Reding    then:
70fe8b45aaSThierry Reding      properties:
71fe8b45aaSThierry Reding        clocks:
72fe8b45aaSThierry Reding          items:
73fe8b45aaSThierry Reding            - description: module clock
74fe8b45aaSThierry Reding
75fe8b45aaSThierry Reding        clock-names:
76fe8b45aaSThierry Reding          items:
77fe8b45aaSThierry Reding            - const: 3d
78fe8b45aaSThierry Reding
79fe8b45aaSThierry Reding        resets:
80fe8b45aaSThierry Reding          items:
81fe8b45aaSThierry Reding            - description: module reset
82fe8b45aaSThierry Reding            - description: memory client hotflush reset
83fe8b45aaSThierry Reding
84fe8b45aaSThierry Reding        reset-names:
85fe8b45aaSThierry Reding          items:
86fe8b45aaSThierry Reding            - const: 3d
87fe8b45aaSThierry Reding            - const: mc
88fe8b45aaSThierry Reding
89fe8b45aaSThierry Reding        iommus:
90fe8b45aaSThierry Reding          maxItems: 1
91fe8b45aaSThierry Reding
92fe8b45aaSThierry Reding        interconnects:
93fe8b45aaSThierry Reding          minItems: 4
94fe8b45aaSThierry Reding          maxItems: 4
95fe8b45aaSThierry Reding
96fe8b45aaSThierry Reding        interconnect-names:
97fe8b45aaSThierry Reding          minItems: 4
98fe8b45aaSThierry Reding          maxItems: 4
99fe8b45aaSThierry Reding
100fe8b45aaSThierry Reding        power-domains:
101fe8b45aaSThierry Reding          items:
102fe8b45aaSThierry Reding            - description: phandle to the TD power domain
103fe8b45aaSThierry Reding
104fe8b45aaSThierry Reding  - if:
105fe8b45aaSThierry Reding      properties:
106fe8b45aaSThierry Reding        compatible:
107fe8b45aaSThierry Reding          contains:
108fe8b45aaSThierry Reding            const: nvidia,tegra30-gr3d
109fe8b45aaSThierry Reding    then:
110fe8b45aaSThierry Reding      properties:
111fe8b45aaSThierry Reding        clocks:
112fe8b45aaSThierry Reding          items:
113fe8b45aaSThierry Reding            - description: primary module clock
114fe8b45aaSThierry Reding            - description: secondary module clock
115fe8b45aaSThierry Reding
116fe8b45aaSThierry Reding        clock-names:
117fe8b45aaSThierry Reding          items:
118fe8b45aaSThierry Reding            - const: 3d
119fe8b45aaSThierry Reding            - const: 3d2
120fe8b45aaSThierry Reding
121fe8b45aaSThierry Reding        resets:
122fe8b45aaSThierry Reding          items:
123fe8b45aaSThierry Reding            - description: primary module reset
124fe8b45aaSThierry Reding            - description: secondary module reset
125fe8b45aaSThierry Reding            - description: primary memory client hotflush reset
126fe8b45aaSThierry Reding            - description: secondary memory client hotflush reset
127fe8b45aaSThierry Reding
128fe8b45aaSThierry Reding        reset-names:
129fe8b45aaSThierry Reding          items:
130fe8b45aaSThierry Reding            - const: 3d
131fe8b45aaSThierry Reding            - const: 3d2
132fe8b45aaSThierry Reding            - const: mc
133fe8b45aaSThierry Reding            - const: mc2
134fe8b45aaSThierry Reding
135fe8b45aaSThierry Reding        iommus:
136fe8b45aaSThierry Reding          minItems: 2
137fe8b45aaSThierry Reding          maxItems: 2
138fe8b45aaSThierry Reding
139fe8b45aaSThierry Reding        interconnects:
140fe8b45aaSThierry Reding          minItems: 8
141fe8b45aaSThierry Reding          maxItems: 8
142fe8b45aaSThierry Reding
143fe8b45aaSThierry Reding        interconnect-names:
144fe8b45aaSThierry Reding          minItems: 8
145fe8b45aaSThierry Reding          maxItems: 8
146fe8b45aaSThierry Reding
147fe8b45aaSThierry Reding        power-domains:
148fe8b45aaSThierry Reding          items:
149fe8b45aaSThierry Reding            - description: phandle to the TD power domain
150fe8b45aaSThierry Reding            - description: phandle to the TD2 power domain
151fe8b45aaSThierry Reding
152fe8b45aaSThierry Reding        power-domain-names:
153fe8b45aaSThierry Reding          items:
154fe8b45aaSThierry Reding            - const: 3d0
155fe8b45aaSThierry Reding            - const: 3d1
156fe8b45aaSThierry Reding
157fe8b45aaSThierry Reding      dependencies:
158fe8b45aaSThierry Reding        power-domains: [ power-domain-names ]
159fe8b45aaSThierry Reding
160fe8b45aaSThierry Reding  - if:
161fe8b45aaSThierry Reding      properties:
162fe8b45aaSThierry Reding        compatible:
163fe8b45aaSThierry Reding          contains:
164fe8b45aaSThierry Reding            const: nvidia,tegra114-gr2d
165fe8b45aaSThierry Reding    then:
166fe8b45aaSThierry Reding      properties:
167fe8b45aaSThierry Reding        clocks:
168fe8b45aaSThierry Reding          items:
169fe8b45aaSThierry Reding            - description: module clock
170fe8b45aaSThierry Reding
171fe8b45aaSThierry Reding        clock-names:
172fe8b45aaSThierry Reding          items:
173fe8b45aaSThierry Reding            - const: 3d
174fe8b45aaSThierry Reding
175fe8b45aaSThierry Reding        resets:
176fe8b45aaSThierry Reding          items:
177fe8b45aaSThierry Reding            - description: module reset
178fe8b45aaSThierry Reding            - description: memory client hotflush reset
179fe8b45aaSThierry Reding
180fe8b45aaSThierry Reding        reset-names:
181fe8b45aaSThierry Reding          items:
182fe8b45aaSThierry Reding            - const: 3d
183fe8b45aaSThierry Reding            - const: mc
184fe8b45aaSThierry Reding
185fe8b45aaSThierry Reding        iommus:
186fe8b45aaSThierry Reding          maxItems: 1
187fe8b45aaSThierry Reding
188fe8b45aaSThierry Reding        interconnects:
189fe8b45aaSThierry Reding          minItems: 10
190fe8b45aaSThierry Reding          maxItems: 10
191fe8b45aaSThierry Reding
192fe8b45aaSThierry Reding        interconnect-names:
193fe8b45aaSThierry Reding          minItems: 10
194fe8b45aaSThierry Reding          maxItems: 10
195fe8b45aaSThierry Reding
196fe8b45aaSThierry Reding        power-domains:
197fe8b45aaSThierry Reding          items:
198fe8b45aaSThierry Reding            - description: phandle to the TD power domain
199fe8b45aaSThierry Reding
200fe8b45aaSThierry RedingadditionalProperties: false
201fe8b45aaSThierry Reding
202fe8b45aaSThierry Redingexamples:
203fe8b45aaSThierry Reding  - |
204fe8b45aaSThierry Reding    #include <dt-bindings/clock/tegra20-car.h>
205fe8b45aaSThierry Reding    #include <dt-bindings/memory/tegra20-mc.h>
206fe8b45aaSThierry Reding
207fe8b45aaSThierry Reding    gr3d@54180000 {
208fe8b45aaSThierry Reding        compatible = "nvidia,tegra20-gr3d";
209fe8b45aaSThierry Reding        reg = <0x54180000 0x00040000>;
210fe8b45aaSThierry Reding        clocks = <&tegra_car TEGRA20_CLK_GR3D>;
211fe8b45aaSThierry Reding        resets = <&tegra_car 24>, <&mc TEGRA20_MC_RESET_3D>;
212fe8b45aaSThierry Reding        reset-names = "3d", "mc";
213fe8b45aaSThierry Reding    };
214