1fe8b45aaSThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2fe8b45aaSThierry Reding%YAML 1.2 3fe8b45aaSThierry Reding--- 4fe8b45aaSThierry Reding$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml# 5fe8b45aaSThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6fe8b45aaSThierry Reding 7fe8b45aaSThierry Redingtitle: NVIDIA 2D graphics engine 8fe8b45aaSThierry Reding 9fe8b45aaSThierry Redingmaintainers: 10fe8b45aaSThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11fe8b45aaSThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12fe8b45aaSThierry Reding 13fe8b45aaSThierry Redingproperties: 14fe8b45aaSThierry Reding $nodename: 15fe8b45aaSThierry Reding pattern: "^gr2d@[0-9a-f]+$" 16fe8b45aaSThierry Reding 17fe8b45aaSThierry Reding compatible: 18fe8b45aaSThierry Reding enum: 19fe8b45aaSThierry Reding - nvidia,tegra20-gr2d 20fe8b45aaSThierry Reding - nvidia,tegra30-gr2d 21fe8b45aaSThierry Reding - nvidia,tegra114-gr2d 22fe8b45aaSThierry Reding 23fe8b45aaSThierry Reding reg: 24fe8b45aaSThierry Reding maxItems: 1 25fe8b45aaSThierry Reding 26fe8b45aaSThierry Reding interrupts: 27fe8b45aaSThierry Reding maxItems: 1 28fe8b45aaSThierry Reding 29fe8b45aaSThierry Reding clocks: 30fe8b45aaSThierry Reding items: 31fe8b45aaSThierry Reding - description: module clock 32fe8b45aaSThierry Reding 33fe8b45aaSThierry Reding resets: 34fe8b45aaSThierry Reding items: 35fe8b45aaSThierry Reding - description: module reset 36fe8b45aaSThierry Reding - description: memory client hotflush reset 37fe8b45aaSThierry Reding 38fe8b45aaSThierry Reding reset-names: 39fe8b45aaSThierry Reding items: 40fe8b45aaSThierry Reding - const: 2d 41fe8b45aaSThierry Reding - const: mc 42fe8b45aaSThierry Reding 43fe8b45aaSThierry Reding iommus: 44fe8b45aaSThierry Reding maxItems: 1 45fe8b45aaSThierry Reding 46fe8b45aaSThierry Reding interconnects: 47fe8b45aaSThierry Reding maxItems: 4 48fe8b45aaSThierry Reding 49fe8b45aaSThierry Reding interconnect-names: 50fe8b45aaSThierry Reding maxItems: 4 51fe8b45aaSThierry Reding 52*21fd06dcSKrzysztof Kozlowski operating-points-v2: true 53fe8b45aaSThierry Reding 54fe8b45aaSThierry Reding power-domains: 55fe8b45aaSThierry Reding items: 56fe8b45aaSThierry Reding - description: phandle to the HEG or core power domain 57fe8b45aaSThierry Reding 58fe8b45aaSThierry RedingadditionalProperties: false 59fe8b45aaSThierry Reding 60fe8b45aaSThierry Redingexamples: 61fe8b45aaSThierry Reding - | 62fe8b45aaSThierry Reding #include <dt-bindings/clock/tegra20-car.h> 63fe8b45aaSThierry Reding #include <dt-bindings/interrupt-controller/arm-gic.h> 64fe8b45aaSThierry Reding #include <dt-bindings/memory/tegra20-mc.h> 65fe8b45aaSThierry Reding 66fe8b45aaSThierry Reding gr2d@54140000 { 67fe8b45aaSThierry Reding compatible = "nvidia,tegra20-gr2d"; 68fe8b45aaSThierry Reding reg = <0x54140000 0x00040000>; 69fe8b45aaSThierry Reding interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 70fe8b45aaSThierry Reding clocks = <&tegra_car TEGRA20_CLK_GR2D>; 71fe8b45aaSThierry Reding resets = <&tegra_car 21>, <&mc TEGRA20_MC_RESET_2D>; 72fe8b45aaSThierry Reding reset-names = "2d", "mc"; 73fe8b45aaSThierry Reding }; 74