xref: /openbmc/linux/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml (revision 4b32e46638c2969c1e2b50b02dd2a23bf7033052)
106097b13SDmitry Baryshkov# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
206097b13SDmitry Baryshkov%YAML 1.2
306097b13SDmitry Baryshkov---
406097b13SDmitry Baryshkov$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
506097b13SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml#
606097b13SDmitry Baryshkov
706097b13SDmitry Baryshkovtitle: Qualcomm QCM220 Display MDSS
806097b13SDmitry Baryshkov
906097b13SDmitry Baryshkovmaintainers:
1006097b13SDmitry Baryshkov  - Loic Poulain <loic.poulain@linaro.org>
1106097b13SDmitry Baryshkov
1206097b13SDmitry Baryshkovdescription:
1306097b13SDmitry Baryshkov  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
1406097b13SDmitry Baryshkov  sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
1506097b13SDmitry Baryshkov  are mentioned for QCM2290 target.
1606097b13SDmitry Baryshkov
1706097b13SDmitry Baryshkov$ref: /schemas/display/msm/mdss-common.yaml#
1806097b13SDmitry Baryshkov
1906097b13SDmitry Baryshkovproperties:
2006097b13SDmitry Baryshkov  compatible:
2106097b13SDmitry Baryshkov    items:
2206097b13SDmitry Baryshkov      - const: qcom,qcm2290-mdss
2306097b13SDmitry Baryshkov
2406097b13SDmitry Baryshkov  clocks:
2506097b13SDmitry Baryshkov    items:
2606097b13SDmitry Baryshkov      - description: Display AHB clock from gcc
2706097b13SDmitry Baryshkov      - description: Display AXI clock
2806097b13SDmitry Baryshkov      - description: Display core clock
2906097b13SDmitry Baryshkov
3006097b13SDmitry Baryshkov  clock-names:
3106097b13SDmitry Baryshkov    items:
3206097b13SDmitry Baryshkov      - const: iface
3306097b13SDmitry Baryshkov      - const: bus
3406097b13SDmitry Baryshkov      - const: core
3506097b13SDmitry Baryshkov
3606097b13SDmitry Baryshkov  iommus:
3706097b13SDmitry Baryshkov    maxItems: 2
3806097b13SDmitry Baryshkov
3906097b13SDmitry Baryshkov  interconnects:
4006097b13SDmitry Baryshkov    maxItems: 1
4106097b13SDmitry Baryshkov
4206097b13SDmitry Baryshkov  interconnect-names:
4306097b13SDmitry Baryshkov    maxItems: 1
4406097b13SDmitry Baryshkov
4506097b13SDmitry BaryshkovpatternProperties:
4606097b13SDmitry Baryshkov  "^display-controller@[0-9a-f]+$":
4706097b13SDmitry Baryshkov    type: object
4806097b13SDmitry Baryshkov    properties:
4906097b13SDmitry Baryshkov      compatible:
5006097b13SDmitry Baryshkov        const: qcom,qcm2290-dpu
5106097b13SDmitry Baryshkov
52*4b32e466SDmitry Baryshkov  "^dsi@[0-9a-f]+$":
53*4b32e466SDmitry Baryshkov    type: object
54*4b32e466SDmitry Baryshkov    properties:
55*4b32e466SDmitry Baryshkov      compatible:
56*4b32e466SDmitry Baryshkov        const: qcom,dsi-ctrl-6g-qcm2290
57*4b32e466SDmitry Baryshkov
58*4b32e466SDmitry Baryshkov  "^phy@[0-9a-f]+$":
59*4b32e466SDmitry Baryshkov    type: object
60*4b32e466SDmitry Baryshkov    properties:
61*4b32e466SDmitry Baryshkov      compatible:
62*4b32e466SDmitry Baryshkov        const: qcom,dsi-phy-14nm-2290
63*4b32e466SDmitry Baryshkov
6406097b13SDmitry BaryshkovunevaluatedProperties: false
6506097b13SDmitry Baryshkov
6606097b13SDmitry Baryshkovexamples:
6706097b13SDmitry Baryshkov  - |
6806097b13SDmitry Baryshkov    #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
6906097b13SDmitry Baryshkov    #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
70*4b32e466SDmitry Baryshkov    #include <dt-bindings/clock/qcom,rpmcc.h>
7106097b13SDmitry Baryshkov    #include <dt-bindings/interrupt-controller/arm-gic.h>
7206097b13SDmitry Baryshkov    #include <dt-bindings/interconnect/qcom,qcm2290.h>
7306097b13SDmitry Baryshkov    #include <dt-bindings/power/qcom-rpmpd.h>
7406097b13SDmitry Baryshkov
7506097b13SDmitry Baryshkov    mdss@5e00000 {
7606097b13SDmitry Baryshkov        #address-cells = <1>;
7706097b13SDmitry Baryshkov        #size-cells = <1>;
7806097b13SDmitry Baryshkov        compatible = "qcom,qcm2290-mdss";
7906097b13SDmitry Baryshkov        reg = <0x05e00000 0x1000>;
8006097b13SDmitry Baryshkov        reg-names = "mdss";
8106097b13SDmitry Baryshkov        power-domains = <&dispcc MDSS_GDSC>;
8206097b13SDmitry Baryshkov        clocks = <&gcc GCC_DISP_AHB_CLK>,
8306097b13SDmitry Baryshkov                 <&gcc GCC_DISP_HF_AXI_CLK>,
8406097b13SDmitry Baryshkov                 <&dispcc DISP_CC_MDSS_MDP_CLK>;
8506097b13SDmitry Baryshkov        clock-names = "iface", "bus", "core";
8606097b13SDmitry Baryshkov
8706097b13SDmitry Baryshkov        interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
8806097b13SDmitry Baryshkov        interrupt-controller;
8906097b13SDmitry Baryshkov        #interrupt-cells = <1>;
9006097b13SDmitry Baryshkov
9106097b13SDmitry Baryshkov        interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
9206097b13SDmitry Baryshkov        interconnect-names = "mdp0-mem";
9306097b13SDmitry Baryshkov
9406097b13SDmitry Baryshkov        iommus = <&apps_smmu 0x420 0x2>,
9506097b13SDmitry Baryshkov                 <&apps_smmu 0x421 0x0>;
9606097b13SDmitry Baryshkov        ranges;
9706097b13SDmitry Baryshkov
9806097b13SDmitry Baryshkov        display-controller@5e01000 {
9906097b13SDmitry Baryshkov            compatible = "qcom,qcm2290-dpu";
10006097b13SDmitry Baryshkov            reg = <0x05e01000 0x8f000>,
10106097b13SDmitry Baryshkov                  <0x05eb0000 0x2008>;
10206097b13SDmitry Baryshkov            reg-names = "mdp", "vbif";
10306097b13SDmitry Baryshkov
10406097b13SDmitry Baryshkov            clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
10506097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_AHB_CLK>,
10606097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_MDP_CLK>,
10706097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
10806097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
10906097b13SDmitry Baryshkov            clock-names = "bus", "iface", "core", "lut", "vsync";
11006097b13SDmitry Baryshkov
11106097b13SDmitry Baryshkov            operating-points-v2 = <&mdp_opp_table>;
11206097b13SDmitry Baryshkov            power-domains = <&rpmpd QCM2290_VDDCX>;
11306097b13SDmitry Baryshkov
11406097b13SDmitry Baryshkov            interrupt-parent = <&mdss>;
11506097b13SDmitry Baryshkov            interrupts = <0>;
11606097b13SDmitry Baryshkov
11706097b13SDmitry Baryshkov            ports {
11806097b13SDmitry Baryshkov                #address-cells = <1>;
11906097b13SDmitry Baryshkov                #size-cells = <0>;
12006097b13SDmitry Baryshkov
12106097b13SDmitry Baryshkov                port@0 {
12206097b13SDmitry Baryshkov                    reg = <0>;
12306097b13SDmitry Baryshkov                    dpu_intf1_out: endpoint {
12406097b13SDmitry Baryshkov                        remote-endpoint = <&dsi0_in>;
12506097b13SDmitry Baryshkov                    };
12606097b13SDmitry Baryshkov                };
12706097b13SDmitry Baryshkov            };
12806097b13SDmitry Baryshkov        };
129*4b32e466SDmitry Baryshkov
130*4b32e466SDmitry Baryshkov        dsi@5e94000 {
131*4b32e466SDmitry Baryshkov            compatible = "qcom,dsi-ctrl-6g-qcm2290";
132*4b32e466SDmitry Baryshkov            reg = <0x05e94000 0x400>;
133*4b32e466SDmitry Baryshkov            reg-names = "dsi_ctrl";
134*4b32e466SDmitry Baryshkov
135*4b32e466SDmitry Baryshkov            interrupt-parent = <&mdss>;
136*4b32e466SDmitry Baryshkov            interrupts = <4>;
137*4b32e466SDmitry Baryshkov
138*4b32e466SDmitry Baryshkov            clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
139*4b32e466SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
140*4b32e466SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
141*4b32e466SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_ESC0_CLK>,
142*4b32e466SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_AHB_CLK>,
143*4b32e466SDmitry Baryshkov                     <&gcc GCC_DISP_HF_AXI_CLK>;
144*4b32e466SDmitry Baryshkov            clock-names = "byte",
145*4b32e466SDmitry Baryshkov                          "byte_intf",
146*4b32e466SDmitry Baryshkov                          "pixel",
147*4b32e466SDmitry Baryshkov                          "core",
148*4b32e466SDmitry Baryshkov                          "iface",
149*4b32e466SDmitry Baryshkov                          "bus";
150*4b32e466SDmitry Baryshkov            assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
151*4b32e466SDmitry Baryshkov            assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
152*4b32e466SDmitry Baryshkov
153*4b32e466SDmitry Baryshkov            operating-points-v2 = <&dsi_opp_table>;
154*4b32e466SDmitry Baryshkov            power-domains = <&rpmpd QCM2290_VDDCX>;
155*4b32e466SDmitry Baryshkov
156*4b32e466SDmitry Baryshkov            phys = <&dsi0_phy>;
157*4b32e466SDmitry Baryshkov            phy-names = "dsi";
158*4b32e466SDmitry Baryshkov
159*4b32e466SDmitry Baryshkov            #address-cells = <1>;
160*4b32e466SDmitry Baryshkov            #size-cells = <0>;
161*4b32e466SDmitry Baryshkov
162*4b32e466SDmitry Baryshkov            ports {
163*4b32e466SDmitry Baryshkov                #address-cells = <1>;
164*4b32e466SDmitry Baryshkov                #size-cells = <0>;
165*4b32e466SDmitry Baryshkov
166*4b32e466SDmitry Baryshkov                port@0 {
167*4b32e466SDmitry Baryshkov                    reg = <0>;
168*4b32e466SDmitry Baryshkov                    dsi0_in: endpoint {
169*4b32e466SDmitry Baryshkov                        remote-endpoint = <&dpu_intf1_out>;
170*4b32e466SDmitry Baryshkov                    };
171*4b32e466SDmitry Baryshkov                };
172*4b32e466SDmitry Baryshkov
173*4b32e466SDmitry Baryshkov                port@1 {
174*4b32e466SDmitry Baryshkov                    reg = <1>;
175*4b32e466SDmitry Baryshkov                    dsi0_out: endpoint {
176*4b32e466SDmitry Baryshkov                    };
177*4b32e466SDmitry Baryshkov                };
178*4b32e466SDmitry Baryshkov            };
179*4b32e466SDmitry Baryshkov        };
180*4b32e466SDmitry Baryshkov
181*4b32e466SDmitry Baryshkov        dsi0_phy: phy@5e94400 {
182*4b32e466SDmitry Baryshkov            compatible = "qcom,dsi-phy-14nm-2290";
183*4b32e466SDmitry Baryshkov            reg = <0x05e94400 0x100>,
184*4b32e466SDmitry Baryshkov                  <0x05e94500 0x300>,
185*4b32e466SDmitry Baryshkov                  <0x05e94800 0x188>;
186*4b32e466SDmitry Baryshkov            reg-names = "dsi_phy",
187*4b32e466SDmitry Baryshkov                        "dsi_phy_lane",
188*4b32e466SDmitry Baryshkov                        "dsi_pll";
189*4b32e466SDmitry Baryshkov
190*4b32e466SDmitry Baryshkov            #clock-cells = <1>;
191*4b32e466SDmitry Baryshkov            #phy-cells = <0>;
192*4b32e466SDmitry Baryshkov
193*4b32e466SDmitry Baryshkov            clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
194*4b32e466SDmitry Baryshkov            clock-names = "iface", "ref";
195*4b32e466SDmitry Baryshkov            vcca-supply = <&vreg_dsi_phy>;
196*4b32e466SDmitry Baryshkov        };
19706097b13SDmitry Baryshkov    };
19806097b13SDmitry Baryshkov...
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