xref: /openbmc/linux/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml (revision 06097b13ef97a5e55dd4131a8a05c5af1aad2ad3)
1*06097b13SDmitry Baryshkov# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2*06097b13SDmitry Baryshkov%YAML 1.2
3*06097b13SDmitry Baryshkov---
4*06097b13SDmitry Baryshkov$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
5*06097b13SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml#
6*06097b13SDmitry Baryshkov
7*06097b13SDmitry Baryshkovtitle: Qualcomm QCM220 Display MDSS
8*06097b13SDmitry Baryshkov
9*06097b13SDmitry Baryshkovmaintainers:
10*06097b13SDmitry Baryshkov  - Loic Poulain <loic.poulain@linaro.org>
11*06097b13SDmitry Baryshkov
12*06097b13SDmitry Baryshkovdescription:
13*06097b13SDmitry Baryshkov  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14*06097b13SDmitry Baryshkov  sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
15*06097b13SDmitry Baryshkov  are mentioned for QCM2290 target.
16*06097b13SDmitry Baryshkov
17*06097b13SDmitry Baryshkov$ref: /schemas/display/msm/mdss-common.yaml#
18*06097b13SDmitry Baryshkov
19*06097b13SDmitry Baryshkovproperties:
20*06097b13SDmitry Baryshkov  compatible:
21*06097b13SDmitry Baryshkov    items:
22*06097b13SDmitry Baryshkov      - const: qcom,qcm2290-mdss
23*06097b13SDmitry Baryshkov
24*06097b13SDmitry Baryshkov  clocks:
25*06097b13SDmitry Baryshkov    items:
26*06097b13SDmitry Baryshkov      - description: Display AHB clock from gcc
27*06097b13SDmitry Baryshkov      - description: Display AXI clock
28*06097b13SDmitry Baryshkov      - description: Display core clock
29*06097b13SDmitry Baryshkov
30*06097b13SDmitry Baryshkov  clock-names:
31*06097b13SDmitry Baryshkov    items:
32*06097b13SDmitry Baryshkov      - const: iface
33*06097b13SDmitry Baryshkov      - const: bus
34*06097b13SDmitry Baryshkov      - const: core
35*06097b13SDmitry Baryshkov
36*06097b13SDmitry Baryshkov  iommus:
37*06097b13SDmitry Baryshkov    maxItems: 2
38*06097b13SDmitry Baryshkov
39*06097b13SDmitry Baryshkov  interconnects:
40*06097b13SDmitry Baryshkov    maxItems: 1
41*06097b13SDmitry Baryshkov
42*06097b13SDmitry Baryshkov  interconnect-names:
43*06097b13SDmitry Baryshkov    maxItems: 1
44*06097b13SDmitry Baryshkov
45*06097b13SDmitry BaryshkovpatternProperties:
46*06097b13SDmitry Baryshkov  "^display-controller@[0-9a-f]+$":
47*06097b13SDmitry Baryshkov    type: object
48*06097b13SDmitry Baryshkov    properties:
49*06097b13SDmitry Baryshkov      compatible:
50*06097b13SDmitry Baryshkov        const: qcom,qcm2290-dpu
51*06097b13SDmitry Baryshkov
52*06097b13SDmitry BaryshkovunevaluatedProperties: false
53*06097b13SDmitry Baryshkov
54*06097b13SDmitry Baryshkovexamples:
55*06097b13SDmitry Baryshkov  - |
56*06097b13SDmitry Baryshkov    #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
57*06097b13SDmitry Baryshkov    #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
58*06097b13SDmitry Baryshkov    #include <dt-bindings/interrupt-controller/arm-gic.h>
59*06097b13SDmitry Baryshkov    #include <dt-bindings/interconnect/qcom,qcm2290.h>
60*06097b13SDmitry Baryshkov    #include <dt-bindings/power/qcom-rpmpd.h>
61*06097b13SDmitry Baryshkov
62*06097b13SDmitry Baryshkov    mdss@5e00000 {
63*06097b13SDmitry Baryshkov        #address-cells = <1>;
64*06097b13SDmitry Baryshkov        #size-cells = <1>;
65*06097b13SDmitry Baryshkov        compatible = "qcom,qcm2290-mdss";
66*06097b13SDmitry Baryshkov        reg = <0x05e00000 0x1000>;
67*06097b13SDmitry Baryshkov        reg-names = "mdss";
68*06097b13SDmitry Baryshkov        power-domains = <&dispcc MDSS_GDSC>;
69*06097b13SDmitry Baryshkov        clocks = <&gcc GCC_DISP_AHB_CLK>,
70*06097b13SDmitry Baryshkov                 <&gcc GCC_DISP_HF_AXI_CLK>,
71*06097b13SDmitry Baryshkov                 <&dispcc DISP_CC_MDSS_MDP_CLK>;
72*06097b13SDmitry Baryshkov        clock-names = "iface", "bus", "core";
73*06097b13SDmitry Baryshkov
74*06097b13SDmitry Baryshkov        interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
75*06097b13SDmitry Baryshkov        interrupt-controller;
76*06097b13SDmitry Baryshkov        #interrupt-cells = <1>;
77*06097b13SDmitry Baryshkov
78*06097b13SDmitry Baryshkov        interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
79*06097b13SDmitry Baryshkov        interconnect-names = "mdp0-mem";
80*06097b13SDmitry Baryshkov
81*06097b13SDmitry Baryshkov        iommus = <&apps_smmu 0x420 0x2>,
82*06097b13SDmitry Baryshkov                 <&apps_smmu 0x421 0x0>;
83*06097b13SDmitry Baryshkov        ranges;
84*06097b13SDmitry Baryshkov
85*06097b13SDmitry Baryshkov        display-controller@5e01000 {
86*06097b13SDmitry Baryshkov            compatible = "qcom,qcm2290-dpu";
87*06097b13SDmitry Baryshkov            reg = <0x05e01000 0x8f000>,
88*06097b13SDmitry Baryshkov                  <0x05eb0000 0x2008>;
89*06097b13SDmitry Baryshkov            reg-names = "mdp", "vbif";
90*06097b13SDmitry Baryshkov
91*06097b13SDmitry Baryshkov            clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
92*06097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_AHB_CLK>,
93*06097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_MDP_CLK>,
94*06097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
95*06097b13SDmitry Baryshkov                     <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
96*06097b13SDmitry Baryshkov            clock-names = "bus", "iface", "core", "lut", "vsync";
97*06097b13SDmitry Baryshkov
98*06097b13SDmitry Baryshkov            operating-points-v2 = <&mdp_opp_table>;
99*06097b13SDmitry Baryshkov            power-domains = <&rpmpd QCM2290_VDDCX>;
100*06097b13SDmitry Baryshkov
101*06097b13SDmitry Baryshkov            interrupt-parent = <&mdss>;
102*06097b13SDmitry Baryshkov            interrupts = <0>;
103*06097b13SDmitry Baryshkov
104*06097b13SDmitry Baryshkov            ports {
105*06097b13SDmitry Baryshkov                #address-cells = <1>;
106*06097b13SDmitry Baryshkov                #size-cells = <0>;
107*06097b13SDmitry Baryshkov
108*06097b13SDmitry Baryshkov                port@0 {
109*06097b13SDmitry Baryshkov                    reg = <0>;
110*06097b13SDmitry Baryshkov                    dpu_intf1_out: endpoint {
111*06097b13SDmitry Baryshkov                        remote-endpoint = <&dsi0_in>;
112*06097b13SDmitry Baryshkov                    };
113*06097b13SDmitry Baryshkov                };
114*06097b13SDmitry Baryshkov            };
115*06097b13SDmitry Baryshkov        };
116*06097b13SDmitry Baryshkov    };
117*06097b13SDmitry Baryshkov...
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