xref: /openbmc/linux/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml (revision 7ad6586652fa736f6d07d8170ac723b8628481ce) 
1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DPU dt properties for MSM8998 target
8
9maintainers:
10  - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
11
12$ref: /schemas/display/msm/dpu-common.yaml#
13
14properties:
15  compatible:
16    const: qcom,msm8998-dpu
17
18  reg:
19    items:
20      - description: Address offset and size for mdp register set
21      - description: Address offset and size for regdma register set
22      - description: Address offset and size for vbif register set
23      - description: Address offset and size for non-realtime vbif register set
24
25  reg-names:
26    items:
27      - const: mdp
28      - const: regdma
29      - const: vbif
30      - const: vbif_nrt
31
32  clocks:
33    items:
34      - description: Display ahb clock
35      - description: Display axi clock
36      - description: Display mem-noc clock
37      - description: Display core clock
38      - description: Display vsync clock
39
40  clock-names:
41    items:
42      - const: iface
43      - const: bus
44      - const: mnoc
45      - const: core
46      - const: vsync
47
48unevaluatedProperties: false
49
50examples:
51  - |
52    #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
53    #include <dt-bindings/power/qcom-rpmpd.h>
54
55    display-controller@c901000 {
56        compatible = "qcom,msm8998-dpu";
57        reg = <0x0c901000 0x8f000>,
58              <0x0c9a8e00 0xf0>,
59              <0x0c9b0000 0x2008>,
60              <0x0c9b8000 0x1040>;
61        reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
62
63        clocks = <&mmcc MDSS_AHB_CLK>,
64                 <&mmcc MDSS_AXI_CLK>,
65                 <&mmcc MNOC_AHB_CLK>,
66                 <&mmcc MDSS_MDP_CLK>,
67                 <&mmcc MDSS_VSYNC_CLK>;
68        clock-names = "iface", "bus", "mnoc", "core", "vsync";
69
70        interrupt-parent = <&mdss>;
71        interrupts = <0>;
72        operating-points-v2 = <&mdp_opp_table>;
73        power-domains = <&rpmpd MSM8998_VDDMX>;
74
75        ports {
76            #address-cells = <1>;
77            #size-cells = <0>;
78
79            port@0 {
80                reg = <0>;
81                endpoint {
82                    remote-endpoint = <&dsi0_in>;
83                };
84            };
85
86            port@1 {
87                reg = <1>;
88                endpoint {
89                    remote-endpoint = <&dsi1_in>;
90                };
91            };
92        };
93    };
94...
95