1*92649241SDavid Heidelberg# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*92649241SDavid Heidelberg%YAML 1.2 3*92649241SDavid Heidelberg--- 4*92649241SDavid Heidelberg$id: "http://devicetree.org/schemas/display/msm/mdp4.yaml#" 5*92649241SDavid Heidelberg$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*92649241SDavid Heidelberg 7*92649241SDavid Heidelbergtitle: Qualcomm Adreno/Snapdragon MDP4 display controller 8*92649241SDavid Heidelberg 9*92649241SDavid Heidelbergdescription: > 10*92649241SDavid Heidelberg MDP4 display controller found in SoCs like MSM8960, APQ8064 and MSM8660. 11*92649241SDavid Heidelberg 12*92649241SDavid Heidelbergmaintainers: 13*92649241SDavid Heidelberg - Rob Clark <robdclark@gmail.com> 14*92649241SDavid Heidelberg 15*92649241SDavid Heidelbergproperties: 16*92649241SDavid Heidelberg compatible: 17*92649241SDavid Heidelberg const: qcom,mdp4 18*92649241SDavid Heidelberg 19*92649241SDavid Heidelberg clocks: 20*92649241SDavid Heidelberg minItems: 6 21*92649241SDavid Heidelberg maxItems: 6 22*92649241SDavid Heidelberg 23*92649241SDavid Heidelberg clock-names: 24*92649241SDavid Heidelberg items: 25*92649241SDavid Heidelberg - const: core_clk 26*92649241SDavid Heidelberg - const: iface_clk 27*92649241SDavid Heidelberg - const: bus_clk 28*92649241SDavid Heidelberg - const: lut_clk 29*92649241SDavid Heidelberg - const: hdmi_clk 30*92649241SDavid Heidelberg - const: tv_clk 31*92649241SDavid Heidelberg 32*92649241SDavid Heidelberg reg: 33*92649241SDavid Heidelberg maxItems: 1 34*92649241SDavid Heidelberg 35*92649241SDavid Heidelberg interrupts: 36*92649241SDavid Heidelberg maxItems: 1 37*92649241SDavid Heidelberg 38*92649241SDavid Heidelberg iommus: 39*92649241SDavid Heidelberg maxItems: 1 40*92649241SDavid Heidelberg 41*92649241SDavid Heidelberg ports: 42*92649241SDavid Heidelberg $ref: /schemas/graph.yaml#/properties/ports 43*92649241SDavid Heidelberg properties: 44*92649241SDavid Heidelberg port@0: 45*92649241SDavid Heidelberg $ref: /schemas/graph.yaml#/properties/port 46*92649241SDavid Heidelberg description: LCDC/LVDS 47*92649241SDavid Heidelberg 48*92649241SDavid Heidelberg port@1: 49*92649241SDavid Heidelberg $ref: /schemas/graph.yaml#/properties/port 50*92649241SDavid Heidelberg description: DSI1 Cmd / Video 51*92649241SDavid Heidelberg 52*92649241SDavid Heidelberg port@2: 53*92649241SDavid Heidelberg $ref: /schemas/graph.yaml#/properties/port 54*92649241SDavid Heidelberg description: DSI2 Cmd / Video 55*92649241SDavid Heidelberg 56*92649241SDavid Heidelberg port@3: 57*92649241SDavid Heidelberg $ref: /schemas/graph.yaml#/properties/port 58*92649241SDavid Heidelberg description: Digital TV 59*92649241SDavid Heidelberg 60*92649241SDavid Heidelberg qcom,lcdc-align-lsb: 61*92649241SDavid Heidelberg type: boolean 62*92649241SDavid Heidelberg description: > 63*92649241SDavid Heidelberg Indication that LSB alignment should be used for LCDC. 64*92649241SDavid Heidelberg This is only valid for 18bpp panels. 65*92649241SDavid Heidelberg 66*92649241SDavid Heidelbergrequired: 67*92649241SDavid Heidelberg - compatible 68*92649241SDavid Heidelberg - reg 69*92649241SDavid Heidelberg - clocks 70*92649241SDavid Heidelberg - ports 71*92649241SDavid Heidelberg 72*92649241SDavid HeidelbergadditionalProperties: false 73*92649241SDavid Heidelberg 74*92649241SDavid Heidelbergexamples: 75*92649241SDavid Heidelberg - | 76*92649241SDavid Heidelberg mdp: mdp@5100000 { 77*92649241SDavid Heidelberg compatible = "qcom,mdp4"; 78*92649241SDavid Heidelberg reg = <0x05100000 0xf0000>; 79*92649241SDavid Heidelberg interrupts = <0 75 0>; 80*92649241SDavid Heidelberg clock-names = 81*92649241SDavid Heidelberg "core_clk", 82*92649241SDavid Heidelberg "iface_clk", 83*92649241SDavid Heidelberg "bus_clk", 84*92649241SDavid Heidelberg "lut_clk", 85*92649241SDavid Heidelberg "hdmi_clk", 86*92649241SDavid Heidelberg "tv_clk"; 87*92649241SDavid Heidelberg clocks = 88*92649241SDavid Heidelberg <&mmcc 77>, 89*92649241SDavid Heidelberg <&mmcc 86>, 90*92649241SDavid Heidelberg <&mmcc 102>, 91*92649241SDavid Heidelberg <&mmcc 75>, 92*92649241SDavid Heidelberg <&mmcc 97>, 93*92649241SDavid Heidelberg <&mmcc 12>; 94*92649241SDavid Heidelberg 95*92649241SDavid Heidelberg ports { 96*92649241SDavid Heidelberg #address-cells = <1>; 97*92649241SDavid Heidelberg #size-cells = <0>; 98*92649241SDavid Heidelberg 99*92649241SDavid Heidelberg port@0 { 100*92649241SDavid Heidelberg reg = <0>; 101*92649241SDavid Heidelberg mdp_lvds_out: endpoint { 102*92649241SDavid Heidelberg }; 103*92649241SDavid Heidelberg }; 104*92649241SDavid Heidelberg 105*92649241SDavid Heidelberg port@1 { 106*92649241SDavid Heidelberg reg = <1>; 107*92649241SDavid Heidelberg mdp_dsi1_out: endpoint { 108*92649241SDavid Heidelberg }; 109*92649241SDavid Heidelberg }; 110*92649241SDavid Heidelberg 111*92649241SDavid Heidelberg port@2 { 112*92649241SDavid Heidelberg reg = <2>; 113*92649241SDavid Heidelberg mdp_dsi2_out: endpoint { 114*92649241SDavid Heidelberg }; 115*92649241SDavid Heidelberg }; 116*92649241SDavid Heidelberg 117*92649241SDavid Heidelberg port@3 { 118*92649241SDavid Heidelberg reg = <3>; 119*92649241SDavid Heidelberg mdp_dtv_out: endpoint { 120*92649241SDavid Heidelberg remote-endpoint = <&hdmi_in>; 121*92649241SDavid Heidelberg }; 122*92649241SDavid Heidelberg }; 123*92649241SDavid Heidelberg }; 124*92649241SDavid Heidelberg }; 125