14ed545e7Sjason-jh.lin# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 24ed545e7Sjason-jh.lin%YAML 1.2 34ed545e7Sjason-jh.lin--- 44ed545e7Sjason-jh.lin$id: http://devicetree.org/schemas/display/mediatek/mediatek,postmask.yaml# 54ed545e7Sjason-jh.lin$schema: http://devicetree.org/meta-schemas/core.yaml# 64ed545e7Sjason-jh.lin 74ed545e7Sjason-jh.lintitle: Mediatek display postmask 84ed545e7Sjason-jh.lin 94ed545e7Sjason-jh.linmaintainers: 104ed545e7Sjason-jh.lin - Chun-Kuang Hu <chunkuang.hu@kernel.org> 114ed545e7Sjason-jh.lin - Philipp Zabel <p.zabel@pengutronix.de> 124ed545e7Sjason-jh.lin 134ed545e7Sjason-jh.lindescription: | 144ed545e7Sjason-jh.lin Mediatek display postmask, namely POSTMASK, provides round corner pattern 154ed545e7Sjason-jh.lin generation. 164ed545e7Sjason-jh.lin POSTMASK device node must be siblings to the central MMSYS_CONFIG node. 174ed545e7Sjason-jh.lin For a description of the MMSYS_CONFIG binding, see 184ed545e7Sjason-jh.lin Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 194ed545e7Sjason-jh.lin for details. 204ed545e7Sjason-jh.lin 214ed545e7Sjason-jh.linproperties: 224ed545e7Sjason-jh.lin compatible: 234ed545e7Sjason-jh.lin oneOf: 24*112d5560SKrzysztof Kozlowski - enum: 25*112d5560SKrzysztof Kozlowski - mediatek,mt8192-disp-postmask 268a26ea19SRex-BC Chen - items: 278a26ea19SRex-BC Chen - enum: 288a26ea19SRex-BC Chen - mediatek,mt8186-disp-postmask 29b5386f29SNathan Lu - mediatek,mt8188-disp-postmask 308a26ea19SRex-BC Chen - const: mediatek,mt8192-disp-postmask 314ed545e7Sjason-jh.lin 324ed545e7Sjason-jh.lin reg: 334ed545e7Sjason-jh.lin maxItems: 1 344ed545e7Sjason-jh.lin 354ed545e7Sjason-jh.lin interrupts: 364ed545e7Sjason-jh.lin maxItems: 1 374ed545e7Sjason-jh.lin 384ed545e7Sjason-jh.lin power-domains: 394ed545e7Sjason-jh.lin description: A phandle and PM domain specifier as defined by bindings of 404ed545e7Sjason-jh.lin the power controller specified by phandle. See 414ed545e7Sjason-jh.lin Documentation/devicetree/bindings/power/power-domain.yaml for details. 424ed545e7Sjason-jh.lin 434ed545e7Sjason-jh.lin clocks: 444ed545e7Sjason-jh.lin items: 454ed545e7Sjason-jh.lin - description: POSTMASK Clock 464ed545e7Sjason-jh.lin 474ed545e7Sjason-jh.lin mediatek,gce-client-reg: 484ed545e7Sjason-jh.lin description: The register of client driver can be configured by gce with 494ed545e7Sjason-jh.lin 4 arguments defined in this property, such as phandle of gce, subsys id, 504ed545e7Sjason-jh.lin register offset and size. Each GCE subsys id is mapping to a client 514ed545e7Sjason-jh.lin defined in the header include/dt-bindings/gce/<chip>-gce.h. 524ed545e7Sjason-jh.lin $ref: /schemas/types.yaml#/definitions/phandle-array 534ed545e7Sjason-jh.lin maxItems: 1 544ed545e7Sjason-jh.lin 554ed545e7Sjason-jh.linrequired: 564ed545e7Sjason-jh.lin - compatible 574ed545e7Sjason-jh.lin - reg 584ed545e7Sjason-jh.lin - interrupts 594ed545e7Sjason-jh.lin - power-domains 604ed545e7Sjason-jh.lin - clocks 614ed545e7Sjason-jh.lin 624ed545e7Sjason-jh.linadditionalProperties: false 634ed545e7Sjason-jh.lin 644ed545e7Sjason-jh.linexamples: 654ed545e7Sjason-jh.lin - | 66bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/interrupt-controller/arm-gic.h> 67bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/clock/mt8192-clk.h> 68bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/power/mt8192-power.h> 69bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/gce/mt8192-gce.h> 70bff4e302SAngeloGioacchino Del Regno 71bff4e302SAngeloGioacchino Del Regno soc { 72bff4e302SAngeloGioacchino Del Regno #address-cells = <2>; 73bff4e302SAngeloGioacchino Del Regno #size-cells = <2>; 744ed545e7Sjason-jh.lin 754ed545e7Sjason-jh.lin postmask0: postmask@1400d000 { 764ed545e7Sjason-jh.lin compatible = "mediatek,mt8192-disp-postmask"; 774ed545e7Sjason-jh.lin reg = <0 0x1400d000 0 0x1000>; 784ed545e7Sjason-jh.lin interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>; 794ed545e7Sjason-jh.lin power-domains = <&scpsys MT8192_POWER_DOMAIN_DISP>; 804ed545e7Sjason-jh.lin clocks = <&mmsys CLK_MM_DISP_POSTMASK0>; 814ed545e7Sjason-jh.lin mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>; 824ed545e7Sjason-jh.lin }; 83bff4e302SAngeloGioacchino Del Regno }; 84