14ed545e7Sjason-jh.lin# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 24ed545e7Sjason-jh.lin%YAML 1.2 34ed545e7Sjason-jh.lin--- 44ed545e7Sjason-jh.lin$id: http://devicetree.org/schemas/display/mediatek/mediatek,dither.yaml# 54ed545e7Sjason-jh.lin$schema: http://devicetree.org/meta-schemas/core.yaml# 64ed545e7Sjason-jh.lin 74ed545e7Sjason-jh.lintitle: Mediatek display dither processor 84ed545e7Sjason-jh.lin 94ed545e7Sjason-jh.linmaintainers: 104ed545e7Sjason-jh.lin - Chun-Kuang Hu <chunkuang.hu@kernel.org> 114ed545e7Sjason-jh.lin - Philipp Zabel <p.zabel@pengutronix.de> 124ed545e7Sjason-jh.lin 134ed545e7Sjason-jh.lindescription: | 144ed545e7Sjason-jh.lin Mediatek display dither processor, namely DITHER, works by approximating 154ed545e7Sjason-jh.lin unavailable colors with available colors and by mixing and matching available 164ed545e7Sjason-jh.lin colors to mimic unavailable ones. 174ed545e7Sjason-jh.lin DITHER device node must be siblings to the central MMSYS_CONFIG node. 184ed545e7Sjason-jh.lin For a description of the MMSYS_CONFIG binding, see 194ed545e7Sjason-jh.lin Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 204ed545e7Sjason-jh.lin for details. 214ed545e7Sjason-jh.lin 224ed545e7Sjason-jh.linproperties: 234ed545e7Sjason-jh.lin compatible: 244ed545e7Sjason-jh.lin oneOf: 25*112d5560SKrzysztof Kozlowski - enum: 26*112d5560SKrzysztof Kozlowski - mediatek,mt8183-disp-dither 274ed545e7Sjason-jh.lin - items: 284ed545e7Sjason-jh.lin - enum: 298a26ea19SRex-BC Chen - mediatek,mt8186-disp-dither 30b5386f29SNathan Lu - mediatek,mt8188-disp-dither 314ed545e7Sjason-jh.lin - mediatek,mt8192-disp-dither 32a79257baSjason-jh.lin - mediatek,mt8195-disp-dither 3346bc0d98SRex-BC Chen - const: mediatek,mt8183-disp-dither 344ed545e7Sjason-jh.lin 354ed545e7Sjason-jh.lin reg: 364ed545e7Sjason-jh.lin maxItems: 1 374ed545e7Sjason-jh.lin 384ed545e7Sjason-jh.lin interrupts: 394ed545e7Sjason-jh.lin maxItems: 1 404ed545e7Sjason-jh.lin 414ed545e7Sjason-jh.lin power-domains: 424ed545e7Sjason-jh.lin description: A phandle and PM domain specifier as defined by bindings of 434ed545e7Sjason-jh.lin the power controller specified by phandle. See 444ed545e7Sjason-jh.lin Documentation/devicetree/bindings/power/power-domain.yaml for details. 454ed545e7Sjason-jh.lin 464ed545e7Sjason-jh.lin clocks: 474ed545e7Sjason-jh.lin items: 484ed545e7Sjason-jh.lin - description: DITHER Clock 494ed545e7Sjason-jh.lin 504ed545e7Sjason-jh.lin mediatek,gce-client-reg: 514ed545e7Sjason-jh.lin description: The register of client driver can be configured by gce with 524ed545e7Sjason-jh.lin 4 arguments defined in this property, such as phandle of gce, subsys id, 534ed545e7Sjason-jh.lin register offset and size. Each GCE subsys id is mapping to a client 544ed545e7Sjason-jh.lin defined in the header include/dt-bindings/gce/<chip>-gce.h. 554ed545e7Sjason-jh.lin $ref: /schemas/types.yaml#/definitions/phandle-array 564ed545e7Sjason-jh.lin maxItems: 1 574ed545e7Sjason-jh.lin 584ed545e7Sjason-jh.linrequired: 594ed545e7Sjason-jh.lin - compatible 604ed545e7Sjason-jh.lin - reg 614ed545e7Sjason-jh.lin - interrupts 624ed545e7Sjason-jh.lin - power-domains 634ed545e7Sjason-jh.lin - clocks 644ed545e7Sjason-jh.lin 654ed545e7Sjason-jh.linadditionalProperties: false 664ed545e7Sjason-jh.lin 674ed545e7Sjason-jh.linexamples: 684ed545e7Sjason-jh.lin - | 69bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/interrupt-controller/arm-gic.h> 70bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/clock/mt8183-clk.h> 71bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/power/mt8183-power.h> 72bff4e302SAngeloGioacchino Del Regno #include <dt-bindings/gce/mt8183-gce.h> 73bff4e302SAngeloGioacchino Del Regno 74bff4e302SAngeloGioacchino Del Regno soc { 75bff4e302SAngeloGioacchino Del Regno #address-cells = <2>; 76bff4e302SAngeloGioacchino Del Regno #size-cells = <2>; 774ed545e7Sjason-jh.lin 784ed545e7Sjason-jh.lin dither0: dither@14012000 { 794ed545e7Sjason-jh.lin compatible = "mediatek,mt8183-disp-dither"; 804ed545e7Sjason-jh.lin reg = <0 0x14012000 0 0x1000>; 814ed545e7Sjason-jh.lin interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>; 824ed545e7Sjason-jh.lin power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; 834ed545e7Sjason-jh.lin clocks = <&mmsys CLK_MM_DISP_DITHER0>; 844ed545e7Sjason-jh.lin mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; 854ed545e7Sjason-jh.lin }; 86bff4e302SAngeloGioacchino Del Regno }; 87