xref: /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ps8640.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1cafddd60SJitao Shi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2cafddd60SJitao Shi%YAML 1.2
3cafddd60SJitao Shi---
4cafddd60SJitao Shi$id: http://devicetree.org/schemas/display/bridge/ps8640.yaml#
5cafddd60SJitao Shi$schema: http://devicetree.org/meta-schemas/core.yaml#
6cafddd60SJitao Shi
7a612130cSKrzysztof Kozlowskititle: MIPI DSI to eDP Video Format Converter
8cafddd60SJitao Shi
9cafddd60SJitao Shimaintainers:
10cafddd60SJitao Shi  - Nicolas Boichat <drinkcat@chromium.org>
11cafddd60SJitao Shi
12cafddd60SJitao Shidescription: |
13cafddd60SJitao Shi  The PS8640 is a low power MIPI-to-eDP video format converter supporting
14cafddd60SJitao Shi  mobile devices with embedded panel resolutions up to 2048 x 1536. The
15cafddd60SJitao Shi  device accepts a single channel of MIPI DSI v1.1, with up to four lanes
16cafddd60SJitao Shi  plus clock, at a transmission rate up to 1.5Gbit/sec per lane. The
17cafddd60SJitao Shi  device outputs eDP v1.4, one or two lanes, at a link rate of up to
18cafddd60SJitao Shi  3.24Gbit/sec per lane.
19cafddd60SJitao Shi
20cafddd60SJitao Shiproperties:
21cafddd60SJitao Shi  compatible:
22cafddd60SJitao Shi    const: parade,ps8640
23cafddd60SJitao Shi
24cafddd60SJitao Shi  reg:
25cafddd60SJitao Shi    maxItems: 1
26cafddd60SJitao Shi    description: Base I2C address of the device.
27cafddd60SJitao Shi
28cafddd60SJitao Shi  powerdown-gpios:
29cafddd60SJitao Shi    maxItems: 1
30cafddd60SJitao Shi    description: GPIO connected to active low powerdown.
31cafddd60SJitao Shi
32cafddd60SJitao Shi  reset-gpios:
33cafddd60SJitao Shi    maxItems: 1
34cafddd60SJitao Shi    description: GPIO connected to active low reset.
35cafddd60SJitao Shi
36cafddd60SJitao Shi  vdd12-supply:
37cafddd60SJitao Shi    description: Regulator for 1.2V digital core power.
38cafddd60SJitao Shi
39cafddd60SJitao Shi  vdd33-supply:
40cafddd60SJitao Shi    description: Regulator for 3.3V digital core power.
41cafddd60SJitao Shi
42e539a77eSPhilip Chen  aux-bus:
43e539a77eSPhilip Chen    $ref: /schemas/display/dp-aux-bus.yaml#
44e539a77eSPhilip Chen
45cafddd60SJitao Shi  ports:
46b6755423SRob Herring    $ref: /schemas/graph.yaml#/properties/ports
47b6755423SRob Herring
48cafddd60SJitao Shi    properties:
49cafddd60SJitao Shi      port@0:
50b6755423SRob Herring        $ref: /schemas/graph.yaml#/properties/port
51b6755423SRob Herring        description:
52cafddd60SJitao Shi          Video port for DSI input
53cafddd60SJitao Shi
54cafddd60SJitao Shi      port@1:
55b6755423SRob Herring        $ref: /schemas/graph.yaml#/properties/port
56b6755423SRob Herring        description:
57cafddd60SJitao Shi          Video port for eDP output (panel or connector).
58cafddd60SJitao Shi
59cafddd60SJitao Shi    required:
60cafddd60SJitao Shi      - port@0
61cafddd60SJitao Shi
62cafddd60SJitao Shirequired:
63cafddd60SJitao Shi  - compatible
64cafddd60SJitao Shi  - reg
65cafddd60SJitao Shi  - powerdown-gpios
66cafddd60SJitao Shi  - reset-gpios
67cafddd60SJitao Shi  - vdd12-supply
68cafddd60SJitao Shi  - vdd33-supply
69cafddd60SJitao Shi  - ports
70cafddd60SJitao Shi
71cafddd60SJitao ShiadditionalProperties: false
72cafddd60SJitao Shi
73cafddd60SJitao Shiexamples:
74cafddd60SJitao Shi  - |
75cafddd60SJitao Shi    #include <dt-bindings/gpio/gpio.h>
76*20a72af1SRob Herring    i2c {
77cafddd60SJitao Shi        #address-cells = <1>;
78cafddd60SJitao Shi        #size-cells = <0>;
79cafddd60SJitao Shi
80cafddd60SJitao Shi        ps8640: edp-bridge@18 {
81cafddd60SJitao Shi            compatible = "parade,ps8640";
82cafddd60SJitao Shi            reg = <0x18>;
83cafddd60SJitao Shi            powerdown-gpios = <&pio 116 GPIO_ACTIVE_LOW>;
84cafddd60SJitao Shi            reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
85cafddd60SJitao Shi            vdd12-supply = <&ps8640_fixed_1v2>;
86cafddd60SJitao Shi            vdd33-supply = <&mt6397_vgp2_reg>;
87cafddd60SJitao Shi
88cafddd60SJitao Shi            ports {
89cafddd60SJitao Shi                #address-cells = <1>;
90cafddd60SJitao Shi                #size-cells = <0>;
91cafddd60SJitao Shi
92cafddd60SJitao Shi                port@0 {
93cafddd60SJitao Shi                    reg = <0>;
94cafddd60SJitao Shi                    ps8640_in: endpoint {
95cafddd60SJitao Shi                        remote-endpoint = <&dsi0_out>;
96cafddd60SJitao Shi                    };
97cafddd60SJitao Shi                };
98cafddd60SJitao Shi
99cafddd60SJitao Shi                port@1 {
100cafddd60SJitao Shi                    reg = <1>;
101cafddd60SJitao Shi                    ps8640_out: endpoint {
102cafddd60SJitao Shi                        remote-endpoint = <&panel_in>;
103cafddd60SJitao Shi                    };
104cafddd60SJitao Shi                };
105cafddd60SJitao Shi            };
106e539a77eSPhilip Chen
107e539a77eSPhilip Chen            aux-bus {
108e539a77eSPhilip Chen                panel {
109e539a77eSPhilip Chen                    compatible = "boe,nv133fhm-n62";
110e539a77eSPhilip Chen                    power-supply = <&pp3300_dx_edp>;
111e539a77eSPhilip Chen                    backlight = <&backlight>;
112e539a77eSPhilip Chen
113e539a77eSPhilip Chen                    port {
114e539a77eSPhilip Chen                        panel_in: endpoint {
115e539a77eSPhilip Chen                            remote-endpoint = <&ps8640_out>;
116e539a77eSPhilip Chen                        };
117e539a77eSPhilip Chen                    };
118e539a77eSPhilip Chen                };
119e539a77eSPhilip Chen            };
120cafddd60SJitao Shi        };
121cafddd60SJitao Shi    };
122