xref: /openbmc/linux/Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt (revision b2fdab37aa8c8985eeeb33a9b2eb1a45dfcd5d79)
1*b2fdab37SPeter Senna TschudinDrivers for the second video output of the GE B850v3:
2*b2fdab37SPeter Senna Tschudin   STDP4028-ge-b850v3-fw bridges (LVDS-DP)
3*b2fdab37SPeter Senna Tschudin   STDP2690-ge-b850v3-fw bridges (DP-DP++)
4*b2fdab37SPeter Senna Tschudin
5*b2fdab37SPeter Senna TschudinThe video processing pipeline on the second output on the GE B850v3:
6*b2fdab37SPeter Senna Tschudin
7*b2fdab37SPeter Senna Tschudin   Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
8*b2fdab37SPeter Senna Tschudin
9*b2fdab37SPeter Senna TschudinEach bridge has a dedicated flash containing firmware for supporting the custom
10*b2fdab37SPeter Senna Tschudindesign. The result is that, in this design, neither the STDP4028 nor the
11*b2fdab37SPeter Senna TschudinSTDP2690 behave as the stock bridges would. The compatible strings include the
12*b2fdab37SPeter Senna Tschudinsuffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
13*b2fdab37SPeter Senna Tschudinthe firmware specific for the GE B850v3.
14*b2fdab37SPeter Senna Tschudin
15*b2fdab37SPeter Senna TschudinThe hardware do not provide control over the video processing pipeline, as the
16*b2fdab37SPeter Senna Tschudintwo bridges behaves as a single one. The only interfaces exposed by the
17*b2fdab37SPeter Senna Tschudinhardware are EDID, HPD, and interrupts.
18*b2fdab37SPeter Senna Tschudin
19*b2fdab37SPeter Senna Tschudinstdp4028-ge-b850v3-fw required properties:
20*b2fdab37SPeter Senna Tschudin  - compatible : "megachips,stdp4028-ge-b850v3-fw"
21*b2fdab37SPeter Senna Tschudin  - reg : I2C bus address
22*b2fdab37SPeter Senna Tschudin  - interrupt-parent : phandle of the interrupt controller that services
23*b2fdab37SPeter Senna Tschudin    interrupts to the device
24*b2fdab37SPeter Senna Tschudin  - interrupts : one interrupt should be described here, as in
25*b2fdab37SPeter Senna Tschudin    <0 IRQ_TYPE_LEVEL_HIGH>
26*b2fdab37SPeter Senna Tschudin  - ports : One input port(reg = <0>) and one output port(reg = <1>)
27*b2fdab37SPeter Senna Tschudin
28*b2fdab37SPeter Senna Tschudinstdp2690-ge-b850v3-fw required properties:
29*b2fdab37SPeter Senna Tschudin    compatible : "megachips,stdp2690-ge-b850v3-fw"
30*b2fdab37SPeter Senna Tschudin  - reg : I2C bus address
31*b2fdab37SPeter Senna Tschudin  - ports : One input port(reg = <0>) and one output port(reg = <1>)
32*b2fdab37SPeter Senna Tschudin
33*b2fdab37SPeter Senna TschudinExample:
34*b2fdab37SPeter Senna Tschudin
35*b2fdab37SPeter Senna Tschudin&mux2_i2c2 {
36*b2fdab37SPeter Senna Tschudin	status = "okay";
37*b2fdab37SPeter Senna Tschudin	clock-frequency = <100000>;
38*b2fdab37SPeter Senna Tschudin
39*b2fdab37SPeter Senna Tschudin	stdp4028@73 {
40*b2fdab37SPeter Senna Tschudin		compatible = "megachips,stdp4028-ge-b850v3-fw";
41*b2fdab37SPeter Senna Tschudin		#address-cells = <1>;
42*b2fdab37SPeter Senna Tschudin		#size-cells = <0>;
43*b2fdab37SPeter Senna Tschudin
44*b2fdab37SPeter Senna Tschudin		reg = <0x73>;
45*b2fdab37SPeter Senna Tschudin
46*b2fdab37SPeter Senna Tschudin		interrupt-parent = <&gpio2>;
47*b2fdab37SPeter Senna Tschudin		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
48*b2fdab37SPeter Senna Tschudin
49*b2fdab37SPeter Senna Tschudin		ports {
50*b2fdab37SPeter Senna Tschudin			#address-cells = <1>;
51*b2fdab37SPeter Senna Tschudin			#size-cells = <0>;
52*b2fdab37SPeter Senna Tschudin
53*b2fdab37SPeter Senna Tschudin			port@0 {
54*b2fdab37SPeter Senna Tschudin				reg = <0>;
55*b2fdab37SPeter Senna Tschudin				stdp4028_in: endpoint {
56*b2fdab37SPeter Senna Tschudin					remote-endpoint = <&lvds0_out>;
57*b2fdab37SPeter Senna Tschudin				};
58*b2fdab37SPeter Senna Tschudin			};
59*b2fdab37SPeter Senna Tschudin			port@1 {
60*b2fdab37SPeter Senna Tschudin				reg = <1>;
61*b2fdab37SPeter Senna Tschudin				stdp4028_out: endpoint {
62*b2fdab37SPeter Senna Tschudin					remote-endpoint = <&stdp2690_in>;
63*b2fdab37SPeter Senna Tschudin				};
64*b2fdab37SPeter Senna Tschudin			};
65*b2fdab37SPeter Senna Tschudin		};
66*b2fdab37SPeter Senna Tschudin	};
67*b2fdab37SPeter Senna Tschudin
68*b2fdab37SPeter Senna Tschudin	stdp2690@72 {
69*b2fdab37SPeter Senna Tschudin		compatible = "megachips,stdp2690-ge-b850v3-fw";
70*b2fdab37SPeter Senna Tschudin		#address-cells = <1>;
71*b2fdab37SPeter Senna Tschudin		#size-cells = <0>;
72*b2fdab37SPeter Senna Tschudin
73*b2fdab37SPeter Senna Tschudin		reg = <0x72>;
74*b2fdab37SPeter Senna Tschudin
75*b2fdab37SPeter Senna Tschudin		ports {
76*b2fdab37SPeter Senna Tschudin			#address-cells = <1>;
77*b2fdab37SPeter Senna Tschudin			#size-cells = <0>;
78*b2fdab37SPeter Senna Tschudin
79*b2fdab37SPeter Senna Tschudin			port@0 {
80*b2fdab37SPeter Senna Tschudin				reg = <0>;
81*b2fdab37SPeter Senna Tschudin				stdp2690_in: endpoint {
82*b2fdab37SPeter Senna Tschudin					remote-endpoint = <&stdp4028_out>;
83*b2fdab37SPeter Senna Tschudin				};
84*b2fdab37SPeter Senna Tschudin			};
85*b2fdab37SPeter Senna Tschudin
86*b2fdab37SPeter Senna Tschudin			port@1 {
87*b2fdab37SPeter Senna Tschudin				reg = <1>;
88*b2fdab37SPeter Senna Tschudin				stdp2690_out: endpoint {
89*b2fdab37SPeter Senna Tschudin					/* Connector for external display */
90*b2fdab37SPeter Senna Tschudin				};
91*b2fdab37SPeter Senna Tschudin			};
92*b2fdab37SPeter Senna Tschudin		};
93*b2fdab37SPeter Senna Tschudin	};
94*b2fdab37SPeter Senna Tschudin};
95