15e6ed29dSallen# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 25e6ed29dSallen%YAML 1.2 35e6ed29dSallen--- 45e6ed29dSallen$id: http://devicetree.org/schemas/display/bridge/ite,it6505.yaml# 55e6ed29dSallen$schema: http://devicetree.org/meta-schemas/core.yaml# 65e6ed29dSallen 7a612130cSKrzysztof Kozlowskititle: ITE it6505 85e6ed29dSallen 95e6ed29dSallenmaintainers: 105e6ed29dSallen - Allen Chen <allen.chen@ite.com.tw> 115e6ed29dSallen 125e6ed29dSallendescription: | 135e6ed29dSallen The IT6505 is a high-performance DisplayPort 1.1a transmitter, 145e6ed29dSallen fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications. 155e6ed29dSallen The IT6505 supports color depth of up to 36 bits (12 bits/color) 165e6ed29dSallen and ensures robust transmission of high-quality uncompressed video 175e6ed29dSallen content, along with uncompressed and compressed digital audio content. 185e6ed29dSallen 195e6ed29dSallen Aside from the various video output formats supported, the IT6505 205e6ed29dSallen also encodes and transmits up to 8 channels of I2S digital audio, 215e6ed29dSallen with sampling rate up to 192kHz and sample size up to 24 bits. 225e6ed29dSallen In addition, an S/PDIF input port takes in compressed audio of up to 235e6ed29dSallen 192kHz frame rate. 245e6ed29dSallen 255e6ed29dSallen Each IT6505 chip comes preprogrammed with an unique HDCP key, 265e6ed29dSallen in compliance with the HDCP 1.3 standard so as to provide secure 275e6ed29dSallen transmission of high-definition content. Users of the IT6505 need not 285e6ed29dSallen purchase any HDCP keys or ROMs. 295e6ed29dSallen 305e6ed29dSallenproperties: 315e6ed29dSallen compatible: 325e6ed29dSallen const: ite,it6505 335e6ed29dSallen 345be478f9SRob Herring reg: 355be478f9SRob Herring maxItems: 1 365be478f9SRob Herring 375e6ed29dSallen ovdd-supply: 385e6ed29dSallen description: I/O voltage 395e6ed29dSallen 405e6ed29dSallen pwr18-supply: 415e6ed29dSallen description: core voltage 425e6ed29dSallen 435e6ed29dSallen interrupts: 445e6ed29dSallen maxItems: 1 455e6ed29dSallen description: interrupt specifier of INT pin 465e6ed29dSallen 475e6ed29dSallen reset-gpios: 485e6ed29dSallen maxItems: 1 495e6ed29dSallen description: gpio specifier of RESET pin 505e6ed29dSallen 515e6ed29dSallen extcon: 525e6ed29dSallen maxItems: 1 535e6ed29dSallen description: extcon specifier for the Power Delivery 545e6ed29dSallen 55*bc809594Sallen chen ports: 56*bc809594Sallen chen $ref: /schemas/graph.yaml#/properties/ports 57*bc809594Sallen chen 58*bc809594Sallen chen properties: 59*bc809594Sallen chen port@0: 60*bc809594Sallen chen $ref: /schemas/graph.yaml#/$defs/port-base 61*bc809594Sallen chen unevaluatedProperties: false 625e6ed29dSallen description: A port node pointing to DPI host port node 635e6ed29dSallen 64*bc809594Sallen chen properties: 65*bc809594Sallen chen endpoint: 66*bc809594Sallen chen $ref: /schemas/graph.yaml#/$defs/endpoint-base 67*bc809594Sallen chen unevaluatedProperties: false 68*bc809594Sallen chen 69*bc809594Sallen chen properties: 70*bc809594Sallen chen link-frequencies: 71*bc809594Sallen chen minItems: 1 72*bc809594Sallen chen maxItems: 1 73*bc809594Sallen chen description: Allowed max link frequencies in Hz 74*bc809594Sallen chen 75*bc809594Sallen chen port@1: 76*bc809594Sallen chen $ref: /schemas/graph.yaml#/$defs/port-base 77*bc809594Sallen chen unevaluatedProperties: false 78*bc809594Sallen chen description: Video port for DP output 79*bc809594Sallen chen 80*bc809594Sallen chen properties: 81*bc809594Sallen chen endpoint: 82*bc809594Sallen chen $ref: /schemas/graph.yaml#/$defs/endpoint-base 83*bc809594Sallen chen unevaluatedProperties: false 84*bc809594Sallen chen 85*bc809594Sallen chen properties: 86*bc809594Sallen chen data-lanes: 87*bc809594Sallen chen minItems: 1 88*bc809594Sallen chen uniqueItems: true 89*bc809594Sallen chen items: 90*bc809594Sallen chen - enum: [ 0, 1 ] 91*bc809594Sallen chen - const: 1 92*bc809594Sallen chen - const: 2 93*bc809594Sallen chen - const: 3 94*bc809594Sallen chen 95*bc809594Sallen chen required: 96*bc809594Sallen chen - port@0 97*bc809594Sallen chen - port@1 98*bc809594Sallen chen 995e6ed29dSallenrequired: 1005e6ed29dSallen - compatible 1015e6ed29dSallen - ovdd-supply 1025e6ed29dSallen - pwr18-supply 1035e6ed29dSallen - interrupts 1045e6ed29dSallen - reset-gpios 1055e6ed29dSallen - extcon 106*bc809594Sallen chen - ports 1075e6ed29dSallen 1085be478f9SRob HerringadditionalProperties: false 1095be478f9SRob Herring 1105e6ed29dSallenexamples: 1115e6ed29dSallen - | 1125e6ed29dSallen #include <dt-bindings/interrupt-controller/irq.h> 1135e6ed29dSallen 1145e6ed29dSallen i2c { 1155e6ed29dSallen #address-cells = <1>; 1165e6ed29dSallen #size-cells = <0>; 1175e6ed29dSallen 1185e6ed29dSallen dp-bridge@5c { 1195e6ed29dSallen compatible = "ite,it6505"; 1205e6ed29dSallen interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>; 1215e6ed29dSallen reg = <0x5c>; 1225e6ed29dSallen pinctrl-names = "default"; 1235e6ed29dSallen pinctrl-0 = <&it6505_pins>; 1245e6ed29dSallen ovdd-supply = <&mt6358_vsim1_reg>; 1255e6ed29dSallen pwr18-supply = <&it6505_pp18_reg>; 1265e6ed29dSallen reset-gpios = <&pio 179 1>; 1275e6ed29dSallen extcon = <&usbc_extcon>; 1285e6ed29dSallen 129*bc809594Sallen chen ports { 130*bc809594Sallen chen #address-cells = <1>; 131*bc809594Sallen chen #size-cells = <0>; 132*bc809594Sallen chen 133*bc809594Sallen chen port@0 { 134*bc809594Sallen chen reg = <0>; 1355e6ed29dSallen it6505_in: endpoint { 1365e6ed29dSallen remote-endpoint = <&dpi_out>; 137*bc809594Sallen chen link-frequencies = /bits/ 64 <150000000>; 138*bc809594Sallen chen }; 139*bc809594Sallen chen }; 140*bc809594Sallen chen 141*bc809594Sallen chen port@1 { 142*bc809594Sallen chen reg = <1>; 143*bc809594Sallen chen it6505_out: endpoint { 144*bc809594Sallen chen remote-endpoint = <&dp_in>; 145*bc809594Sallen chen data-lanes = <0 1>; 146*bc809594Sallen chen }; 1475e6ed29dSallen }; 1485e6ed29dSallen }; 1495e6ed29dSallen }; 1505e6ed29dSallen }; 151