1f5a98bfeSMaxime Ripard# SPDX-License-Identifier: GPL-2.0 2f5a98bfeSMaxime Ripard%YAML 1.2 3f5a98bfeSMaxime Ripard--- 4f5a98bfeSMaxime Ripard$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml# 5f5a98bfeSMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 6f5a98bfeSMaxime Ripard 7*dd3cb467SAndrew Lunntitle: Allwinner A10 HDMI Controller 8f5a98bfeSMaxime Ripard 9f5a98bfeSMaxime Riparddescription: | 10f5a98bfeSMaxime Ripard The HDMI Encoder supports the HDMI video and audio outputs, and does 11f5a98bfeSMaxime Ripard CEC. It is one end of the pipeline. 12f5a98bfeSMaxime Ripard 13f5a98bfeSMaxime Ripardmaintainers: 14f5a98bfeSMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 15f5a98bfeSMaxime Ripard - Maxime Ripard <mripard@kernel.org> 16f5a98bfeSMaxime Ripard 17f5a98bfeSMaxime Ripardproperties: 18f5a98bfeSMaxime Ripard compatible: 19f5a98bfeSMaxime Ripard oneOf: 20f5a98bfeSMaxime Ripard - const: allwinner,sun4i-a10-hdmi 21f5a98bfeSMaxime Ripard - const: allwinner,sun5i-a10s-hdmi 22f5a98bfeSMaxime Ripard - const: allwinner,sun6i-a31-hdmi 23f5a98bfeSMaxime Ripard - items: 24f5a98bfeSMaxime Ripard - const: allwinner,sun7i-a20-hdmi 25f5a98bfeSMaxime Ripard - const: allwinner,sun5i-a10s-hdmi 26f5a98bfeSMaxime Ripard 27f5a98bfeSMaxime Ripard reg: 28f5a98bfeSMaxime Ripard maxItems: 1 29f5a98bfeSMaxime Ripard 30f5a98bfeSMaxime Ripard interrupts: 31f5a98bfeSMaxime Ripard maxItems: 1 32f5a98bfeSMaxime Ripard 33f5a98bfeSMaxime Ripard clocks: 34f5a98bfeSMaxime Ripard oneOf: 35f5a98bfeSMaxime Ripard - items: 36f5a98bfeSMaxime Ripard - description: The HDMI interface clock 37f5a98bfeSMaxime Ripard - description: The HDMI module clock 38f5a98bfeSMaxime Ripard - description: The first video PLL 39f5a98bfeSMaxime Ripard - description: The second video PLL 40f5a98bfeSMaxime Ripard 41f5a98bfeSMaxime Ripard - items: 42f5a98bfeSMaxime Ripard - description: The HDMI interface clock 43f5a98bfeSMaxime Ripard - description: The HDMI module clock 44f5a98bfeSMaxime Ripard - description: The HDMI DDC clock 45f5a98bfeSMaxime Ripard - description: The first video PLL 46f5a98bfeSMaxime Ripard - description: The second video PLL 47f5a98bfeSMaxime Ripard 48f5a98bfeSMaxime Ripard clock-names: 49f5a98bfeSMaxime Ripard oneOf: 50f5a98bfeSMaxime Ripard - items: 51f5a98bfeSMaxime Ripard - const: ahb 52f5a98bfeSMaxime Ripard - const: mod 53f5a98bfeSMaxime Ripard - const: pll-0 54f5a98bfeSMaxime Ripard - const: pll-1 55f5a98bfeSMaxime Ripard 56f5a98bfeSMaxime Ripard - items: 57f5a98bfeSMaxime Ripard - const: ahb 58f5a98bfeSMaxime Ripard - const: mod 59f5a98bfeSMaxime Ripard - const: ddc 60f5a98bfeSMaxime Ripard - const: pll-0 61f5a98bfeSMaxime Ripard - const: pll-1 62f5a98bfeSMaxime Ripard 63f5a98bfeSMaxime Ripard resets: 64f5a98bfeSMaxime Ripard maxItems: 1 65f5a98bfeSMaxime Ripard 66f5a98bfeSMaxime Ripard dmas: 67f5a98bfeSMaxime Ripard items: 68f5a98bfeSMaxime Ripard - description: DDC Transmission DMA Channel 69f5a98bfeSMaxime Ripard - description: DDC Reception DMA Channel 70f5a98bfeSMaxime Ripard - description: Audio Transmission DMA Channel 71f5a98bfeSMaxime Ripard 72f5a98bfeSMaxime Ripard dma-names: 73f5a98bfeSMaxime Ripard items: 74f5a98bfeSMaxime Ripard - const: ddc-tx 75f5a98bfeSMaxime Ripard - const: ddc-rx 76f5a98bfeSMaxime Ripard - const: audio-tx 77f5a98bfeSMaxime Ripard 78f5a98bfeSMaxime Ripard ports: 79b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/ports 80f5a98bfeSMaxime Ripard 81f5a98bfeSMaxime Ripard properties: 82f5a98bfeSMaxime Ripard port@0: 83b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 84f5a98bfeSMaxime Ripard description: | 85f5a98bfeSMaxime Ripard Input endpoints of the controller. 86f5a98bfeSMaxime Ripard 87f5a98bfeSMaxime Ripard port@1: 88b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 89f5a98bfeSMaxime Ripard description: | 90f5a98bfeSMaxime Ripard Output endpoints of the controller. Usually an HDMI 91f5a98bfeSMaxime Ripard connector. 92f5a98bfeSMaxime Ripard 93f5a98bfeSMaxime Ripard required: 94f5a98bfeSMaxime Ripard - port@0 95f5a98bfeSMaxime Ripard - port@1 96f5a98bfeSMaxime Ripard 97f5a98bfeSMaxime Ripardrequired: 98f5a98bfeSMaxime Ripard - compatible 99f5a98bfeSMaxime Ripard - reg 100f5a98bfeSMaxime Ripard - interrupts 101f5a98bfeSMaxime Ripard - clocks 102f5a98bfeSMaxime Ripard - clock-names 103f5a98bfeSMaxime Ripard - dmas 104f5a98bfeSMaxime Ripard - dma-names 105f5a98bfeSMaxime Ripard 106f5a98bfeSMaxime Ripardif: 107f5a98bfeSMaxime Ripard properties: 108f5a98bfeSMaxime Ripard compatible: 109f5a98bfeSMaxime Ripard contains: 110f5a98bfeSMaxime Ripard const: allwinner,sun6i-a31-hdmi 111f5a98bfeSMaxime Ripard 112f5a98bfeSMaxime Ripardthen: 113f5a98bfeSMaxime Ripard properties: 114f5a98bfeSMaxime Ripard clocks: 115f5a98bfeSMaxime Ripard minItems: 5 116f5a98bfeSMaxime Ripard 117f5a98bfeSMaxime Ripard clock-names: 118f5a98bfeSMaxime Ripard minItems: 5 119f5a98bfeSMaxime Ripard 120f5a98bfeSMaxime Ripard required: 121f5a98bfeSMaxime Ripard - resets 122f5a98bfeSMaxime Ripard 123f5a98bfeSMaxime RipardadditionalProperties: false 124f5a98bfeSMaxime Ripard 125f5a98bfeSMaxime Ripardexamples: 126f5a98bfeSMaxime Ripard - | 127f5a98bfeSMaxime Ripard #include <dt-bindings/clock/sun4i-a10-ccu.h> 128f5a98bfeSMaxime Ripard #include <dt-bindings/dma/sun4i-a10.h> 129f5a98bfeSMaxime Ripard #include <dt-bindings/reset/sun4i-a10-ccu.h> 130f5a98bfeSMaxime Ripard 131f5a98bfeSMaxime Ripard hdmi: hdmi@1c16000 { 132f5a98bfeSMaxime Ripard compatible = "allwinner,sun4i-a10-hdmi"; 133f5a98bfeSMaxime Ripard reg = <0x01c16000 0x1000>; 134f5a98bfeSMaxime Ripard interrupts = <58>; 135f5a98bfeSMaxime Ripard clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>, 136f5a98bfeSMaxime Ripard <&ccu CLK_PLL_VIDEO0_2X>, 137f5a98bfeSMaxime Ripard <&ccu CLK_PLL_VIDEO1_2X>; 138f5a98bfeSMaxime Ripard clock-names = "ahb", "mod", "pll-0", "pll-1"; 139f5a98bfeSMaxime Ripard dmas = <&dma SUN4I_DMA_NORMAL 16>, 140f5a98bfeSMaxime Ripard <&dma SUN4I_DMA_NORMAL 16>, 141f5a98bfeSMaxime Ripard <&dma SUN4I_DMA_DEDICATED 24>; 142f5a98bfeSMaxime Ripard dma-names = "ddc-tx", "ddc-rx", "audio-tx"; 143f5a98bfeSMaxime Ripard 144f5a98bfeSMaxime Ripard ports { 145f5a98bfeSMaxime Ripard #address-cells = <1>; 146f5a98bfeSMaxime Ripard #size-cells = <0>; 147f5a98bfeSMaxime Ripard 148f5a98bfeSMaxime Ripard hdmi_in: port@0 { 149f5a98bfeSMaxime Ripard #address-cells = <1>; 150f5a98bfeSMaxime Ripard #size-cells = <0>; 151f5a98bfeSMaxime Ripard reg = <0>; 152f5a98bfeSMaxime Ripard 153f5a98bfeSMaxime Ripard hdmi_in_tcon0: endpoint@0 { 154f5a98bfeSMaxime Ripard reg = <0>; 155f5a98bfeSMaxime Ripard remote-endpoint = <&tcon0_out_hdmi>; 156f5a98bfeSMaxime Ripard }; 157f5a98bfeSMaxime Ripard 158f5a98bfeSMaxime Ripard hdmi_in_tcon1: endpoint@1 { 159f5a98bfeSMaxime Ripard reg = <1>; 160f5a98bfeSMaxime Ripard remote-endpoint = <&tcon1_out_hdmi>; 161f5a98bfeSMaxime Ripard }; 162f5a98bfeSMaxime Ripard }; 163f5a98bfeSMaxime Ripard 164f5a98bfeSMaxime Ripard hdmi_out: port@1 { 165f5a98bfeSMaxime Ripard reg = <1>; 166f5a98bfeSMaxime Ripard }; 167f5a98bfeSMaxime Ripard }; 168f5a98bfeSMaxime Ripard }; 169f5a98bfeSMaxime Ripard 170f5a98bfeSMaxime Ripard... 171