xref: /openbmc/linux/Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml (revision 271ca53cb0c8b3a45c73e1140fc3336c2da42315) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra30 Activity Monitor
8
9maintainers:
10  - Dmitry Osipenko <digetx@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12  - Thierry Reding <thierry.reding@gmail.com>
13
14description: |
15  The activity monitor block collects statistics about the behaviour of other
16  components in the system. This information can be used to derive the rate at
17  which the external memory needs to be clocked in order to serve all requests
18  from the monitored clients.
19
20properties:
21  compatible:
22    enum:
23      - nvidia,tegra30-actmon
24      - nvidia,tegra114-actmon
25      - nvidia,tegra124-actmon
26      - nvidia,tegra210-actmon
27
28  reg:
29    maxItems: 1
30
31  clocks:
32    maxItems: 2
33
34  clock-names:
35    items:
36      - const: actmon
37      - const: emc
38
39  resets:
40    maxItems: 1
41
42  reset-names:
43    items:
44      - const: actmon
45
46  interrupts:
47    maxItems: 1
48
49  interconnects:
50    minItems: 1
51    maxItems: 12
52
53  interconnect-names:
54    minItems: 1
55    maxItems: 12
56    description:
57      Should include name of the interconnect path for each interconnect
58      entry. Consult TRM documentation for information about available
59      memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections.
60
61  operating-points-v2:
62    description:
63      Should contain freqs and voltages and opp-supported-hw property, which
64      is a bitfield indicating SoC speedo ID mask.
65
66required:
67  - compatible
68  - reg
69  - clocks
70  - clock-names
71  - resets
72  - reset-names
73  - interrupts
74  - interconnects
75  - interconnect-names
76  - operating-points-v2
77
78additionalProperties: false
79
80examples:
81  - |
82    #include <dt-bindings/memory/tegra30-mc.h>
83
84    mc: memory-controller@7000f000 {
85        compatible = "nvidia,tegra30-mc";
86        reg = <0x7000f000 0x400>;
87        clocks = <&clk 32>;
88        clock-names = "mc";
89
90        interrupts = <0 77 4>;
91
92        #iommu-cells = <1>;
93        #reset-cells = <1>;
94        #interconnect-cells = <1>;
95    };
96
97    emc: external-memory-controller@7000f400 {
98        compatible = "nvidia,tegra30-emc";
99        reg = <0x7000f400 0x400>;
100        interrupts = <0 78 4>;
101        clocks = <&clk 57>;
102
103        nvidia,memory-controller = <&mc>;
104        operating-points-v2 = <&dvfs_opp_table>;
105        power-domains = <&domain>;
106
107        #interconnect-cells = <0>;
108    };
109
110    actmon@6000c800 {
111        compatible = "nvidia,tegra30-actmon";
112        reg = <0x6000c800 0x400>;
113        interrupts = <0 45 4>;
114        clocks = <&clk 119>, <&clk 57>;
115        clock-names = "actmon", "emc";
116        resets = <&rst 119>;
117        reset-names = "actmon";
118        operating-points-v2 = <&dvfs_opp_table>;
119        interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
120        interconnect-names = "cpu-read";
121    };
122