1d3d81969SLin Huang 2d3d81969SLin Huang* Rockchip rk3399 DFI device 3d3d81969SLin Huang 4d3d81969SLin HuangRequired properties: 5d3d81969SLin Huang- compatible: Must be "rockchip,rk3399-dfi". 6d3d81969SLin Huang- reg: physical base address of each DFI and length of memory mapped region 7d3d81969SLin Huang- rockchip,pmu: phandle to the syscon managing the "pmu general register files" 8d3d81969SLin Huang- clocks: phandles for clock specified in "clock-names" property 9d3d81969SLin Huang- clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon"; 10d3d81969SLin Huang 11d3d81969SLin HuangExample: 12*4c9847b7SMathieu Malaterre dfi: dfi@ff630000 { 13d3d81969SLin Huang compatible = "rockchip,rk3399-dfi"; 14d3d81969SLin Huang reg = <0x00 0xff630000 0x00 0x4000>; 15d3d81969SLin Huang rockchip,pmu = <&pmugrf>; 16d3d81969SLin Huang clocks = <&cru PCLK_DDR_MON>; 17d3d81969SLin Huang clock-names = "pclk_ddr_mon"; 18d3d81969SLin Huang }; 19