1ceced4acSBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ceced4acSBenjamin Gaignard%YAML 1.2 3ceced4acSBenjamin Gaignard--- 4ceced4acSBenjamin Gaignard$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml# 5ceced4acSBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 6ceced4acSBenjamin Gaignard 784e85359SKrzysztof Kozlowskititle: STMicroelectronics STM32 HASH 8ceced4acSBenjamin Gaignard 985f3fc54SLinus Walleijdescription: The STM32 HASH block is built on the HASH block found in 1085f3fc54SLinus Walleij the STn8820 SoC introduced in 2007, and subsequently used in the U8500 1185f3fc54SLinus Walleij SoC in 2010. 1285f3fc54SLinus Walleij 13ceced4acSBenjamin Gaignardmaintainers: 14f4eedebdSPatrice Chotard - Lionel Debieve <lionel.debieve@foss.st.com> 15ceced4acSBenjamin Gaignard 16ceced4acSBenjamin Gaignardproperties: 17ceced4acSBenjamin Gaignard compatible: 18ceced4acSBenjamin Gaignard enum: 1985f3fc54SLinus Walleij - st,stn8820-hash 2085f3fc54SLinus Walleij - stericsson,ux500-hash 21ceced4acSBenjamin Gaignard - st,stm32f456-hash 22ceced4acSBenjamin Gaignard - st,stm32f756-hash 23*0d517943SLionel Debieve - st,stm32mp13-hash 24ceced4acSBenjamin Gaignard 25ceced4acSBenjamin Gaignard reg: 26ceced4acSBenjamin Gaignard maxItems: 1 27ceced4acSBenjamin Gaignard 28ceced4acSBenjamin Gaignard clocks: 29ceced4acSBenjamin Gaignard maxItems: 1 30ceced4acSBenjamin Gaignard 31ceced4acSBenjamin Gaignard interrupts: 32ceced4acSBenjamin Gaignard maxItems: 1 33ceced4acSBenjamin Gaignard 34ceced4acSBenjamin Gaignard resets: 35ceced4acSBenjamin Gaignard maxItems: 1 36ceced4acSBenjamin Gaignard 37ceced4acSBenjamin Gaignard dmas: 38ceced4acSBenjamin Gaignard maxItems: 1 39ceced4acSBenjamin Gaignard 40ceced4acSBenjamin Gaignard dma-names: 41ceced4acSBenjamin Gaignard items: 42ceced4acSBenjamin Gaignard - const: in 43ceced4acSBenjamin Gaignard 44ceced4acSBenjamin Gaignard dma-maxburst: 45ceced4acSBenjamin Gaignard description: Set number of maximum dma burst supported 463d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 473d21a460SRob Herring minimum: 0 483d21a460SRob Herring maximum: 2 493d21a460SRob Herring default: 0 50ceced4acSBenjamin Gaignard 5185f3fc54SLinus Walleij power-domains: 5285f3fc54SLinus Walleij maxItems: 1 5385f3fc54SLinus Walleij 54ceced4acSBenjamin Gaignardrequired: 55ceced4acSBenjamin Gaignard - compatible 56ceced4acSBenjamin Gaignard - reg 57ceced4acSBenjamin Gaignard - clocks 5885f3fc54SLinus Walleij 5985f3fc54SLinus WalleijallOf: 6085f3fc54SLinus Walleij - if: 6185f3fc54SLinus Walleij properties: 6285f3fc54SLinus Walleij compatible: 6385f3fc54SLinus Walleij items: 6485f3fc54SLinus Walleij const: stericsson,ux500-hash 6585f3fc54SLinus Walleij then: 6685f3fc54SLinus Walleij properties: 6785f3fc54SLinus Walleij interrupts: false 6885f3fc54SLinus Walleij else: 6985f3fc54SLinus Walleij required: 70ceced4acSBenjamin Gaignard - interrupts 71ceced4acSBenjamin Gaignard 72ceced4acSBenjamin GaignardadditionalProperties: false 73ceced4acSBenjamin Gaignard 74ceced4acSBenjamin Gaignardexamples: 75ceced4acSBenjamin Gaignard - | 76ceced4acSBenjamin Gaignard #include <dt-bindings/interrupt-controller/arm-gic.h> 77ceced4acSBenjamin Gaignard #include <dt-bindings/clock/stm32mp1-clks.h> 78ceced4acSBenjamin Gaignard #include <dt-bindings/reset/stm32mp1-resets.h> 79ceced4acSBenjamin Gaignard hash@54002000 { 80ceced4acSBenjamin Gaignard compatible = "st,stm32f756-hash"; 81ceced4acSBenjamin Gaignard reg = <0x54002000 0x400>; 82ceced4acSBenjamin Gaignard interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 83ceced4acSBenjamin Gaignard clocks = <&rcc HASH1>; 84ceced4acSBenjamin Gaignard resets = <&rcc HASH1_R>; 85ceced4acSBenjamin Gaignard dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>; 86ceced4acSBenjamin Gaignard dma-names = "in"; 87ceced4acSBenjamin Gaignard dma-maxburst = <2>; 88ceced4acSBenjamin Gaignard }; 89ceced4acSBenjamin Gaignard 90ceced4acSBenjamin Gaignard... 91