1*ce43b4b2SNeal Liu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ce43b4b2SNeal Liu%YAML 1.2 3*ce43b4b2SNeal Liu--- 4*ce43b4b2SNeal Liu$id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml# 5*ce43b4b2SNeal Liu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ce43b4b2SNeal Liu 7*ce43b4b2SNeal Liutitle: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines 8*ce43b4b2SNeal Liu 9*ce43b4b2SNeal Liumaintainers: 10*ce43b4b2SNeal Liu - Neal Liu <neal_liu@aspeedtech.com> 11*ce43b4b2SNeal Liu 12*ce43b4b2SNeal Liudescription: 13*ce43b4b2SNeal Liu The ACRY ECDSA/RSA engines is designed to accelerate the throughput 14*ce43b4b2SNeal Liu of ECDSA/RSA signature and verification. Basically, ACRY can be 15*ce43b4b2SNeal Liu divided into two independent engines - ECC Engine and RSA Engine. 16*ce43b4b2SNeal Liu 17*ce43b4b2SNeal Liuproperties: 18*ce43b4b2SNeal Liu compatible: 19*ce43b4b2SNeal Liu enum: 20*ce43b4b2SNeal Liu - aspeed,ast2600-acry 21*ce43b4b2SNeal Liu 22*ce43b4b2SNeal Liu reg: 23*ce43b4b2SNeal Liu items: 24*ce43b4b2SNeal Liu - description: acry base address & size 25*ce43b4b2SNeal Liu - description: acry sram base address & size 26*ce43b4b2SNeal Liu 27*ce43b4b2SNeal Liu clocks: 28*ce43b4b2SNeal Liu maxItems: 1 29*ce43b4b2SNeal Liu 30*ce43b4b2SNeal Liu interrupts: 31*ce43b4b2SNeal Liu maxItems: 1 32*ce43b4b2SNeal Liu 33*ce43b4b2SNeal Liurequired: 34*ce43b4b2SNeal Liu - compatible 35*ce43b4b2SNeal Liu - reg 36*ce43b4b2SNeal Liu - clocks 37*ce43b4b2SNeal Liu - interrupts 38*ce43b4b2SNeal Liu 39*ce43b4b2SNeal LiuadditionalProperties: false 40*ce43b4b2SNeal Liu 41*ce43b4b2SNeal Liuexamples: 42*ce43b4b2SNeal Liu - | 43*ce43b4b2SNeal Liu #include <dt-bindings/clock/ast2600-clock.h> 44*ce43b4b2SNeal Liu acry: crypto@1e6fa000 { 45*ce43b4b2SNeal Liu compatible = "aspeed,ast2600-acry"; 46*ce43b4b2SNeal Liu reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; 47*ce43b4b2SNeal Liu interrupts = <160>; 48*ce43b4b2SNeal Liu clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; 49*ce43b4b2SNeal Liu }; 50