1e83c4e4dSGabriel FERNANDEZBinding for a ST multiplexed clock driver. 2e83c4e4dSGabriel FERNANDEZ 3e83c4e4dSGabriel FERNANDEZThis binding supports only simple indexed multiplexers, it does not 4e83c4e4dSGabriel FERNANDEZsupport table based parent index to hardware value translations. 5e83c4e4dSGabriel FERNANDEZ 6e83c4e4dSGabriel FERNANDEZThis binding uses the common clock binding[1]. 7e83c4e4dSGabriel FERNANDEZ 8e83c4e4dSGabriel FERNANDEZ[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 9e83c4e4dSGabriel FERNANDEZ 10e83c4e4dSGabriel FERNANDEZRequired properties: 11e83c4e4dSGabriel FERNANDEZ 12e83c4e4dSGabriel FERNANDEZ- compatible : shall be: 13*880d54ffSGabriel Fernandez "st,stih407-clkgen-a9-mux" 14e83c4e4dSGabriel FERNANDEZ 15e83c4e4dSGabriel FERNANDEZ- #clock-cells : from common clock binding; shall be set to 0. 16e83c4e4dSGabriel FERNANDEZ 17e83c4e4dSGabriel FERNANDEZ- reg : A Base address and length of the register set. 18e83c4e4dSGabriel FERNANDEZ 19e83c4e4dSGabriel FERNANDEZ- clocks : from common clock binding 20e83c4e4dSGabriel FERNANDEZ 21e83c4e4dSGabriel FERNANDEZExample: 22e83c4e4dSGabriel FERNANDEZ 237df404c9SGabriel Fernandez clk_m_a9: clk-m-a9@92b0000 { 24e83c4e4dSGabriel FERNANDEZ #clock-cells = <0>; 257df404c9SGabriel Fernandez compatible = "st,stih407-clkgen-a9-mux"; 267df404c9SGabriel Fernandez reg = <0x92b0000 0x10000>; 27e83c4e4dSGabriel FERNANDEZ 287df404c9SGabriel Fernandez clocks = <&clockgen_a9_pll 0>, 297df404c9SGabriel Fernandez <&clockgen_a9_pll 0>, 307df404c9SGabriel Fernandez <&clk_s_c0_flexgen 13>, 317df404c9SGabriel Fernandez <&clk_m_a9_ext2f_div2>; 32e83c4e4dSGabriel FERNANDEZ }; 33