xref: /openbmc/linux/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt (revision cf40a76e7d5874bb25f4404eecc58a2e033af885)
1*06dda9d7STomasz Figa* Samsung S3C64xx Clock Controller
2*06dda9d7STomasz Figa
3*06dda9d7STomasz FigaThe S3C64xx clock controller generates and supplies clock to various controllers
4*06dda9d7STomasz Figawithin the SoC. The clock binding described here is applicable to all SoCs in
5*06dda9d7STomasz Figathe S3C64xx family.
6*06dda9d7STomasz Figa
7*06dda9d7STomasz FigaRequired Properties:
8*06dda9d7STomasz Figa
9*06dda9d7STomasz Figa- compatible: should be one of the following.
10*06dda9d7STomasz Figa  - "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC.
11*06dda9d7STomasz Figa  - "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC.
12*06dda9d7STomasz Figa
13*06dda9d7STomasz Figa- reg: physical base address of the controller and length of memory mapped
14*06dda9d7STomasz Figa  region.
15*06dda9d7STomasz Figa
16*06dda9d7STomasz Figa- #clock-cells: should be 1.
17*06dda9d7STomasz Figa
18*06dda9d7STomasz FigaEach clock is assigned an identifier and client nodes can use this identifier
19*06dda9d7STomasz Figato specify the clock which they consume. Some of the clocks are available only
20*06dda9d7STomasz Figaon a particular S3C64xx SoC and this is specified where applicable.
21*06dda9d7STomasz Figa
22*06dda9d7STomasz FigaAll available clocks are defined as preprocessor macros in
23*06dda9d7STomasz Figadt-bindings/clock/samsung,s3c64xx-clock.h header and can be used in device
24*06dda9d7STomasz Figatree sources.
25*06dda9d7STomasz Figa
26*06dda9d7STomasz FigaExternal clocks:
27*06dda9d7STomasz Figa
28*06dda9d7STomasz FigaThere are several clocks that are generated outside the SoC. It is expected
29*06dda9d7STomasz Figathat they are defined using standard clock bindings with following
30*06dda9d7STomasz Figaclock-output-names:
31*06dda9d7STomasz Figa - "fin_pll" - PLL input clock (xtal/extclk) - required,
32*06dda9d7STomasz Figa - "xusbxti" - USB xtal - required,
33*06dda9d7STomasz Figa - "iiscdclk0" - I2S0 codec clock - optional,
34*06dda9d7STomasz Figa - "iiscdclk1" - I2S1 codec clock - optional,
35*06dda9d7STomasz Figa - "iiscdclk2" - I2S2 codec clock - optional,
36*06dda9d7STomasz Figa - "pcmcdclk0" - PCM0 codec clock - optional,
37*06dda9d7STomasz Figa - "pcmcdclk1" - PCM1 codec clock - optional, only S3C6410.
38*06dda9d7STomasz Figa
39*06dda9d7STomasz FigaExample: Clock controller node:
40*06dda9d7STomasz Figa
41*06dda9d7STomasz Figa	clock: clock-controller@7e00f000 {
42*06dda9d7STomasz Figa		compatible = "samsung,s3c6410-clock";
43*06dda9d7STomasz Figa		reg = <0x7e00f000 0x1000>;
44*06dda9d7STomasz Figa		#clock-cells = <1>;
45*06dda9d7STomasz Figa	};
46*06dda9d7STomasz Figa
47*06dda9d7STomasz FigaExample: Required external clocks:
48*06dda9d7STomasz Figa
49*06dda9d7STomasz Figa	fin_pll: clock-fin-pll {
50*06dda9d7STomasz Figa		compatible = "fixed-clock";
51*06dda9d7STomasz Figa		clock-output-names = "fin_pll";
52*06dda9d7STomasz Figa		clock-frequency = <12000000>;
53*06dda9d7STomasz Figa		#clock-cells = <0>;
54*06dda9d7STomasz Figa	};
55*06dda9d7STomasz Figa
56*06dda9d7STomasz Figa	xusbxti: clock-xusbxti {
57*06dda9d7STomasz Figa		compatible = "fixed-clock";
58*06dda9d7STomasz Figa		clock-output-names = "xusbxti";
59*06dda9d7STomasz Figa		clock-frequency = <48000000>;
60*06dda9d7STomasz Figa		#clock-cells = <0>;
61*06dda9d7STomasz Figa	};
62*06dda9d7STomasz Figa
63*06dda9d7STomasz FigaExample: UART controller node that consumes the clock generated by the clock
64*06dda9d7STomasz Figa  controller (refer to the standard clock bindings for information about
65*06dda9d7STomasz Figa  "clocks" and "clock-names" properties):
66*06dda9d7STomasz Figa
67*06dda9d7STomasz Figa		uart0: serial@7f005000 {
68*06dda9d7STomasz Figa			compatible = "samsung,s3c6400-uart";
69*06dda9d7STomasz Figa			reg = <0x7f005000 0x100>;
70*06dda9d7STomasz Figa			interrupt-parent = <&vic1>;
71*06dda9d7STomasz Figa			interrupts = <5>;
72*06dda9d7STomasz Figa			clock-names = "uart", "clk_uart_baud2",
73*06dda9d7STomasz Figa					"clk_uart_baud3";
74*06dda9d7STomasz Figa			clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>,
75*06dda9d7STomasz Figa					<&clock SCLK_UART>;
76*06dda9d7STomasz Figa		};
77