1553f9bd4SNeil Armstrong# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2553f9bd4SNeil Armstrong%YAML 1.2 3553f9bd4SNeil Armstrong--- 4553f9bd4SNeil Armstrong$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml# 5553f9bd4SNeil Armstrong$schema: http://devicetree.org/meta-schemas/core.yaml# 6553f9bd4SNeil Armstrong 7553f9bd4SNeil Armstrongtitle: Qualcomm Display Clock & Reset Controller for SM8550 8553f9bd4SNeil Armstrong 9553f9bd4SNeil Armstrongmaintainers: 10553f9bd4SNeil Armstrong - Bjorn Andersson <andersson@kernel.org> 11553f9bd4SNeil Armstrong - Neil Armstrong <neil.armstrong@linaro.org> 12553f9bd4SNeil Armstrong 13553f9bd4SNeil Armstrongdescription: | 14553f9bd4SNeil Armstrong Qualcomm display clock control module provides the clocks, resets and power 15553f9bd4SNeil Armstrong domains on SM8550. 16553f9bd4SNeil Armstrong 17553f9bd4SNeil Armstrong See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h 18553f9bd4SNeil Armstrong 19553f9bd4SNeil Armstrongproperties: 20553f9bd4SNeil Armstrong compatible: 21553f9bd4SNeil Armstrong enum: 22553f9bd4SNeil Armstrong - qcom,sm8550-dispcc 23553f9bd4SNeil Armstrong 24553f9bd4SNeil Armstrong clocks: 25553f9bd4SNeil Armstrong items: 26553f9bd4SNeil Armstrong - description: Board XO source 27553f9bd4SNeil Armstrong - description: Board Always On XO source 28553f9bd4SNeil Armstrong - description: Display's AHB clock 29553f9bd4SNeil Armstrong - description: sleep clock 30553f9bd4SNeil Armstrong - description: Byte clock from DSI PHY0 31553f9bd4SNeil Armstrong - description: Pixel clock from DSI PHY0 32553f9bd4SNeil Armstrong - description: Byte clock from DSI PHY1 33553f9bd4SNeil Armstrong - description: Pixel clock from DSI PHY1 34553f9bd4SNeil Armstrong - description: Link clock from DP PHY0 35553f9bd4SNeil Armstrong - description: VCO DIV clock from DP PHY0 36553f9bd4SNeil Armstrong - description: Link clock from DP PHY1 37553f9bd4SNeil Armstrong - description: VCO DIV clock from DP PHY1 38553f9bd4SNeil Armstrong - description: Link clock from DP PHY2 39553f9bd4SNeil Armstrong - description: VCO DIV clock from DP PHY2 40553f9bd4SNeil Armstrong - description: Link clock from DP PHY3 41553f9bd4SNeil Armstrong - description: VCO DIV clock from DP PHY3 42553f9bd4SNeil Armstrong 43553f9bd4SNeil Armstrong '#clock-cells': 44553f9bd4SNeil Armstrong const: 1 45553f9bd4SNeil Armstrong 46553f9bd4SNeil Armstrong '#reset-cells': 47553f9bd4SNeil Armstrong const: 1 48553f9bd4SNeil Armstrong 49553f9bd4SNeil Armstrong '#power-domain-cells': 50553f9bd4SNeil Armstrong const: 1 51553f9bd4SNeil Armstrong 52553f9bd4SNeil Armstrong reg: 53553f9bd4SNeil Armstrong maxItems: 1 54553f9bd4SNeil Armstrong 55553f9bd4SNeil Armstrong power-domains: 56553f9bd4SNeil Armstrong description: 57553f9bd4SNeil Armstrong A phandle and PM domain specifier for the MMCX power domain. 58553f9bd4SNeil Armstrong maxItems: 1 59553f9bd4SNeil Armstrong 60553f9bd4SNeil Armstrong required-opps: 61553f9bd4SNeil Armstrong description: 62553f9bd4SNeil Armstrong A phandle to an OPP node describing required MMCX performance point. 63553f9bd4SNeil Armstrong maxItems: 1 64553f9bd4SNeil Armstrong 65553f9bd4SNeil Armstrongrequired: 66553f9bd4SNeil Armstrong - compatible 67553f9bd4SNeil Armstrong - reg 68553f9bd4SNeil Armstrong - clocks 69553f9bd4SNeil Armstrong - '#clock-cells' 70553f9bd4SNeil Armstrong - '#reset-cells' 71553f9bd4SNeil Armstrong - '#power-domain-cells' 72553f9bd4SNeil Armstrong 73553f9bd4SNeil ArmstrongadditionalProperties: false 74553f9bd4SNeil Armstrong 75553f9bd4SNeil Armstrongexamples: 76553f9bd4SNeil Armstrong - | 77553f9bd4SNeil Armstrong #include <dt-bindings/clock/qcom,sm8550-gcc.h> 78553f9bd4SNeil Armstrong #include <dt-bindings/clock/qcom,rpmh.h> 79*014f3272SRohit Agarwal #include <dt-bindings/power/qcom,rpmhpd.h> 80553f9bd4SNeil Armstrong clock-controller@af00000 { 81553f9bd4SNeil Armstrong compatible = "qcom,sm8550-dispcc"; 82553f9bd4SNeil Armstrong reg = <0x0af00000 0x10000>; 83553f9bd4SNeil Armstrong clocks = <&rpmhcc RPMH_CXO_CLK>, 84553f9bd4SNeil Armstrong <&rpmhcc RPMH_CXO_CLK_A>, 85553f9bd4SNeil Armstrong <&gcc GCC_DISP_AHB_CLK>, 86553f9bd4SNeil Armstrong <&sleep_clk>, 87553f9bd4SNeil Armstrong <&dsi0_phy 0>, 88553f9bd4SNeil Armstrong <&dsi0_phy 1>, 89553f9bd4SNeil Armstrong <&dsi1_phy 0>, 90553f9bd4SNeil Armstrong <&dsi1_phy 1>, 91553f9bd4SNeil Armstrong <&dp0_phy 0>, 92553f9bd4SNeil Armstrong <&dp0_phy 1>, 93553f9bd4SNeil Armstrong <&dp1_phy 0>, 94553f9bd4SNeil Armstrong <&dp1_phy 1>, 95553f9bd4SNeil Armstrong <&dp2_phy 0>, 96553f9bd4SNeil Armstrong <&dp2_phy 1>, 97553f9bd4SNeil Armstrong <&dp3_phy 0>, 98553f9bd4SNeil Armstrong <&dp3_phy 1>; 99553f9bd4SNeil Armstrong #clock-cells = <1>; 100553f9bd4SNeil Armstrong #reset-cells = <1>; 101553f9bd4SNeil Armstrong #power-domain-cells = <1>; 102*014f3272SRohit Agarwal power-domains = <&rpmhpd RPMHPD_MMCX>; 103553f9bd4SNeil Armstrong required-opps = <&rpmhpd_opp_low_svs>; 104553f9bd4SNeil Armstrong }; 105553f9bd4SNeil Armstrong... 106