1ab8ba01bSGregory CLEMENTDevice Tree Clock bindings for cpu clock of Marvell EBU platforms 2ab8ba01bSGregory CLEMENT 3ab8ba01bSGregory CLEMENTRequired properties: 4ab8ba01bSGregory CLEMENT- compatible : shall be one of the following: 5ab8ba01bSGregory CLEMENT "marvell,armada-xp-cpu-clock" - cpu clocks for Armada XP 6*ee2d8ea1SThomas Petazzoni- reg : Address and length of the clock complex register set, followed 7*ee2d8ea1SThomas Petazzoni by address and length of the PMU DFS registers 8ab8ba01bSGregory CLEMENT- #clock-cells : should be set to 1. 9ab8ba01bSGregory CLEMENT- clocks : shall be the input parent clock phandle for the clock. 10ab8ba01bSGregory CLEMENT 11ab8ba01bSGregory CLEMENTcpuclk: clock-complex@d0018700 { 12ab8ba01bSGregory CLEMENT #clock-cells = <1>; 13ab8ba01bSGregory CLEMENT compatible = "marvell,armada-xp-cpu-clock"; 14*ee2d8ea1SThomas Petazzoni reg = <0xd0018700 0xA0>, <0x1c054 0x10>; 15ab8ba01bSGregory CLEMENT clocks = <&coreclk 1>; 16ab8ba01bSGregory CLEMENT} 17ab8ba01bSGregory CLEMENT 18ab8ba01bSGregory CLEMENTcpu@0 { 19ab8ba01bSGregory CLEMENT compatible = "marvell,sheeva-v7"; 20ab8ba01bSGregory CLEMENT reg = <0>; 21ab8ba01bSGregory CLEMENT clocks = <&cpuclk 0>; 22ab8ba01bSGregory CLEMENT}; 23