1*cfcefe36SJohnson Wang# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*cfcefe36SJohnson Wang%YAML 1.2 3*cfcefe36SJohnson Wang--- 4*cfcefe36SJohnson Wang$id: http://devicetree.org/schemas/clock/mediatek,mt8186-fhctl.yaml# 5*cfcefe36SJohnson Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*cfcefe36SJohnson Wang 7*cfcefe36SJohnson Wangtitle: MediaTek frequency hopping and spread spectrum clocking control 8*cfcefe36SJohnson Wang 9*cfcefe36SJohnson Wangmaintainers: 10*cfcefe36SJohnson Wang - Edward-JW Yang <edward-jw.yang@mediatek.com> 11*cfcefe36SJohnson Wang 12*cfcefe36SJohnson Wangdescription: | 13*cfcefe36SJohnson Wang Frequency hopping control (FHCTL) is a piece of hardware that control 14*cfcefe36SJohnson Wang some PLLs to adopt "hopping" mechanism to adjust their frequency. 15*cfcefe36SJohnson Wang Spread spectrum clocking (SSC) is another function provided by this hardware. 16*cfcefe36SJohnson Wang 17*cfcefe36SJohnson Wangproperties: 18*cfcefe36SJohnson Wang compatible: 19*cfcefe36SJohnson Wang const: mediatek,mt8186-fhctl 20*cfcefe36SJohnson Wang 21*cfcefe36SJohnson Wang reg: 22*cfcefe36SJohnson Wang maxItems: 1 23*cfcefe36SJohnson Wang 24*cfcefe36SJohnson Wang clocks: 25*cfcefe36SJohnson Wang description: Phandles of the PLL with FHCTL hardware capability. 26*cfcefe36SJohnson Wang minItems: 1 27*cfcefe36SJohnson Wang maxItems: 30 28*cfcefe36SJohnson Wang 29*cfcefe36SJohnson Wang mediatek,hopping-ssc-percent: 30*cfcefe36SJohnson Wang description: The percentage of spread spectrum clocking for one PLL. 31*cfcefe36SJohnson Wang minItems: 1 32*cfcefe36SJohnson Wang maxItems: 30 33*cfcefe36SJohnson Wang items: 34*cfcefe36SJohnson Wang default: 0 35*cfcefe36SJohnson Wang minimum: 0 36*cfcefe36SJohnson Wang maximum: 8 37*cfcefe36SJohnson Wang 38*cfcefe36SJohnson Wangrequired: 39*cfcefe36SJohnson Wang - compatible 40*cfcefe36SJohnson Wang - reg 41*cfcefe36SJohnson Wang - clocks 42*cfcefe36SJohnson Wang 43*cfcefe36SJohnson WangadditionalProperties: false 44*cfcefe36SJohnson Wang 45*cfcefe36SJohnson Wangexamples: 46*cfcefe36SJohnson Wang - | 47*cfcefe36SJohnson Wang #include <dt-bindings/clock/mt8186-clk.h> 48*cfcefe36SJohnson Wang fhctl: fhctl@1000ce00 { 49*cfcefe36SJohnson Wang compatible = "mediatek,mt8186-fhctl"; 50*cfcefe36SJohnson Wang reg = <0x1000ce00 0x200>; 51*cfcefe36SJohnson Wang clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>; 52*cfcefe36SJohnson Wang mediatek,hopping-ssc-percent = <3>; 53*cfcefe36SJohnson Wang }; 54