1*923587aaSJose AbreuBinding for the AXS10X I2S PLL clock 2*923587aaSJose Abreu 3*923587aaSJose AbreuThis binding uses the common clock binding[1]. 4*923587aaSJose Abreu 5*923587aaSJose Abreu[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 6*923587aaSJose Abreu 7*923587aaSJose AbreuRequired properties: 8*923587aaSJose Abreu- compatible: shall be "snps,axs10x-i2s-pll-clock" 9*923587aaSJose Abreu- reg : address and length of the I2S PLL register set. 10*923587aaSJose Abreu- clocks: shall be the input parent clock phandle for the PLL. 11*923587aaSJose Abreu- #clock-cells: from common clock binding; Should always be set to 0. 12*923587aaSJose Abreu 13*923587aaSJose AbreuExample: 14*923587aaSJose Abreu pll_clock: pll_clock { 15*923587aaSJose Abreu compatible = "fixed-clock"; 16*923587aaSJose Abreu clock-frequency = <27000000>; 17*923587aaSJose Abreu #clock-cells = <0>; 18*923587aaSJose Abreu }; 19*923587aaSJose Abreu 20*923587aaSJose Abreu i2s_clock@100a0 { 21*923587aaSJose Abreu compatible = "snps,axs10x-i2s-pll-clock"; 22*923587aaSJose Abreu reg = <0x100a0 0x10>; 23*923587aaSJose Abreu clocks = <&pll_clock>; 24*923587aaSJose Abreu #clock-cells = <0>; 25*923587aaSJose Abreu }; 26