1*f95cad74SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 2*f95cad74SMaxime Ripard%YAML 1.2 3*f95cad74SMaxime Ripard--- 4*f95cad74SMaxime Ripard$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml# 5*f95cad74SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f95cad74SMaxime Ripard 7*f95cad74SMaxime Ripardtitle: Allwinner A10 Module 0 Clock Device Tree Bindings 8*f95cad74SMaxime Ripard 9*f95cad74SMaxime Ripardmaintainers: 10*f95cad74SMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 11*f95cad74SMaxime Ripard - Maxime Ripard <mripard@kernel.org> 12*f95cad74SMaxime Ripard 13*f95cad74SMaxime Riparddeprecated: true 14*f95cad74SMaxime Ripard 15*f95cad74SMaxime Ripardselect: 16*f95cad74SMaxime Ripard properties: 17*f95cad74SMaxime Ripard compatible: 18*f95cad74SMaxime Ripard contains: 19*f95cad74SMaxime Ripard enum: 20*f95cad74SMaxime Ripard - allwinner,sun4i-a10-mod0-clk 21*f95cad74SMaxime Ripard - allwinner,sun9i-a80-mod0-clk 22*f95cad74SMaxime Ripard 23*f95cad74SMaxime Ripard # The PRCM on the A31 and A23 will have the reg property missing, 24*f95cad74SMaxime Ripard # since it's set at the upper level node, and will be validated by 25*f95cad74SMaxime Ripard # PRCM's schema. Make sure we only validate standalone nodes. 26*f95cad74SMaxime Ripard required: 27*f95cad74SMaxime Ripard - compatible 28*f95cad74SMaxime Ripard - reg 29*f95cad74SMaxime Ripard 30*f95cad74SMaxime Ripardproperties: 31*f95cad74SMaxime Ripard "#clock-cells": 32*f95cad74SMaxime Ripard const: 0 33*f95cad74SMaxime Ripard 34*f95cad74SMaxime Ripard compatible: 35*f95cad74SMaxime Ripard enum: 36*f95cad74SMaxime Ripard - allwinner,sun4i-a10-mod0-clk 37*f95cad74SMaxime Ripard - allwinner,sun9i-a80-mod0-clk 38*f95cad74SMaxime Ripard 39*f95cad74SMaxime Ripard reg: 40*f95cad74SMaxime Ripard maxItems: 1 41*f95cad74SMaxime Ripard 42*f95cad74SMaxime Ripard clocks: 43*f95cad74SMaxime Ripard # On the A80, the PRCM mod0 clocks have 2 parents. 44*f95cad74SMaxime Ripard minItems: 2 45*f95cad74SMaxime Ripard maxItems: 3 46*f95cad74SMaxime Ripard description: > 47*f95cad74SMaxime Ripard The parent order must match the hardware programming order. 48*f95cad74SMaxime Ripard 49*f95cad74SMaxime Ripard clock-output-names: 50*f95cad74SMaxime Ripard maxItems: 1 51*f95cad74SMaxime Ripard 52*f95cad74SMaxime Ripardrequired: 53*f95cad74SMaxime Ripard - "#clock-cells" 54*f95cad74SMaxime Ripard - compatible 55*f95cad74SMaxime Ripard - reg 56*f95cad74SMaxime Ripard - clocks 57*f95cad74SMaxime Ripard - clock-output-names 58*f95cad74SMaxime Ripard 59*f95cad74SMaxime RipardadditionalProperties: false 60*f95cad74SMaxime Ripard 61*f95cad74SMaxime Ripardexamples: 62*f95cad74SMaxime Ripard - | 63*f95cad74SMaxime Ripard clk@1c20080 { 64*f95cad74SMaxime Ripard #clock-cells = <0>; 65*f95cad74SMaxime Ripard compatible = "allwinner,sun4i-a10-mod0-clk"; 66*f95cad74SMaxime Ripard reg = <0x01c20080 0x4>; 67*f95cad74SMaxime Ripard clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 68*f95cad74SMaxime Ripard clock-output-names = "nand"; 69*f95cad74SMaxime Ripard }; 70*f95cad74SMaxime Ripard 71*f95cad74SMaxime Ripard - | 72*f95cad74SMaxime Ripard clk@8001454 { 73*f95cad74SMaxime Ripard #clock-cells = <0>; 74*f95cad74SMaxime Ripard compatible = "allwinner,sun4i-a10-mod0-clk"; 75*f95cad74SMaxime Ripard reg = <0x08001454 0x4>; 76*f95cad74SMaxime Ripard clocks = <&osc32k>, <&osc24M>; 77*f95cad74SMaxime Ripard clock-output-names = "r_ir"; 78*f95cad74SMaxime Ripard }; 79*f95cad74SMaxime Ripard 80*f95cad74SMaxime Ripard... 81