1e36f9381SSameer Pujar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2e36f9381SSameer Pujar%YAML 1.2 3e36f9381SSameer Pujar--- 4e36f9381SSameer Pujar$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml# 5e36f9381SSameer Pujar$schema: http://devicetree.org/meta-schemas/core.yaml# 6e36f9381SSameer Pujar 7e36f9381SSameer Pujartitle: NVIDIA Tegra ACONNECT Bus 8e36f9381SSameer Pujar 9e36f9381SSameer Pujardescription: | 10*47aab533SBjorn Helgaas The Tegra ACONNECT bus is an AXI switch which is used to connect various 11e36f9381SSameer Pujar components inside the Audio Processing Engine (APE). All CPU accesses to 12e36f9381SSameer Pujar the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All 13*47aab533SBjorn Helgaas devices accessed via the ACONNECT are described by child-nodes. 14e36f9381SSameer Pujar 15e36f9381SSameer Pujarmaintainers: 16e36f9381SSameer Pujar - Jon Hunter <jonathanh@nvidia.com> 17e36f9381SSameer Pujar 18e36f9381SSameer Pujarproperties: 19e36f9381SSameer Pujar compatible: 20e36f9381SSameer Pujar oneOf: 21e36f9381SSameer Pujar - const: nvidia,tegra210-aconnect 22e36f9381SSameer Pujar - items: 23e36f9381SSameer Pujar - enum: 24fed44d6cSSameer Pujar - nvidia,tegra234-aconnect 25e36f9381SSameer Pujar - nvidia,tegra186-aconnect 26e36f9381SSameer Pujar - nvidia,tegra194-aconnect 27e36f9381SSameer Pujar - const: nvidia,tegra210-aconnect 28e36f9381SSameer Pujar 29e36f9381SSameer Pujar clocks: 30e36f9381SSameer Pujar items: 31e36f9381SSameer Pujar - description: Must contain the entry for APE clock 32e36f9381SSameer Pujar - description: Must contain the entry for APE interface clock 33e36f9381SSameer Pujar 34e36f9381SSameer Pujar clock-names: 35e36f9381SSameer Pujar items: 36e36f9381SSameer Pujar - const: ape 37e36f9381SSameer Pujar - const: apb2ape 38e36f9381SSameer Pujar 39e36f9381SSameer Pujar power-domains: 40e36f9381SSameer Pujar maxItems: 1 41e36f9381SSameer Pujar 42e36f9381SSameer Pujar "#address-cells": 436427569fSThierry Reding enum: [ 1, 2 ] 44e36f9381SSameer Pujar 45e36f9381SSameer Pujar "#size-cells": 466427569fSThierry Reding enum: [ 1, 2 ] 47e36f9381SSameer Pujar 48e36f9381SSameer Pujar ranges: true 49e36f9381SSameer Pujar 50e36f9381SSameer PujarpatternProperties: 51e36f9381SSameer Pujar "@[0-9a-f]+$": 52e36f9381SSameer Pujar type: object 53e36f9381SSameer Pujar 54e36f9381SSameer Pujarrequired: 55e36f9381SSameer Pujar - compatible 56e36f9381SSameer Pujar - clocks 57e36f9381SSameer Pujar - clock-names 58e36f9381SSameer Pujar - power-domains 59e36f9381SSameer Pujar - "#address-cells" 60e36f9381SSameer Pujar - "#size-cells" 61e36f9381SSameer Pujar - ranges 62e36f9381SSameer Pujar 63e36f9381SSameer PujaradditionalProperties: false 64e36f9381SSameer Pujar 65e36f9381SSameer Pujarexamples: 66e36f9381SSameer Pujar - | 67e36f9381SSameer Pujar #include<dt-bindings/clock/tegra210-car.h> 68e36f9381SSameer Pujar 69e36f9381SSameer Pujar aconnect@702c0000 { 70e36f9381SSameer Pujar compatible = "nvidia,tegra210-aconnect"; 71e36f9381SSameer Pujar clocks = <&tegra_car TEGRA210_CLK_APE>, 72e36f9381SSameer Pujar <&tegra_car TEGRA210_CLK_APB2APE>; 73e36f9381SSameer Pujar clock-names = "ape", "apb2ape"; 74e36f9381SSameer Pujar power-domains = <&pd_audio>; 75e36f9381SSameer Pujar 76e36f9381SSameer Pujar #address-cells = <1>; 77e36f9381SSameer Pujar #size-cells = <1>; 78e36f9381SSameer Pujar ranges = <0x702c0000 0x702c0000 0x00040000>; 79e36f9381SSameer Pujar 80e36f9381SSameer Pujar // Child device nodes follow ... 81e36f9381SSameer Pujar }; 82e36f9381SSameer Pujar 83e36f9381SSameer Pujar... 84