xref: /openbmc/linux/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt (revision c25141062a82ae8bddced1b3ce2b57a1c0efabe0)
1437dd8c3STang YuantianBinding for Freescale QorIQ AHCI SATA Controller
2437dd8c3STang Yuantian
3437dd8c3STang YuantianRequired properties:
4437dd8c3STang Yuantian  - reg: Physical base address and size of the controller's register area.
5437dd8c3STang Yuantian  - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
6*5f6e9217SYuantian Tang    chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
7437dd8c3STang Yuantian  - clocks: Input clock specifier. Refer to common clock bindings.
8437dd8c3STang Yuantian  - interrupts: Interrupt specifier. Refer to interrupt binding.
9437dd8c3STang Yuantian
10437dd8c3STang YuantianOptional properties:
11d72c0f43STang Yuantian  - dma-coherent: Enable AHCI coherent DMA operation.
12d72c0f43STang Yuantian  - reg-names: register area names when there are more than 1 register area.
13437dd8c3STang Yuantian
14437dd8c3STang YuantianExamples:
15437dd8c3STang Yuantian	sata@3200000 {
16437dd8c3STang Yuantian		compatible = "fsl,ls1021a-ahci";
17437dd8c3STang Yuantian		reg = <0x0 0x3200000 0x0 0x10000>;
18437dd8c3STang Yuantian		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
19437dd8c3STang Yuantian		clocks = <&platform_clk 1>;
20437dd8c3STang Yuantian		dma-coherent;
21437dd8c3STang Yuantian	};
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