xref: /openbmc/linux/Documentation/devicetree/bindings/arm/psci.yaml (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
15025ef8bSRob Herring# SPDX-License-Identifier: GPL-2.0
25025ef8bSRob Herring%YAML 1.2
35025ef8bSRob Herring---
45025ef8bSRob Herring$id: http://devicetree.org/schemas/arm/psci.yaml#
55025ef8bSRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml#
65025ef8bSRob Herring
75025ef8bSRob Herringtitle: Power State Coordination Interface (PSCI)
85025ef8bSRob Herring
95025ef8bSRob Herringmaintainers:
105025ef8bSRob Herring  - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
115025ef8bSRob Herring
125025ef8bSRob Herringdescription: |+
135025ef8bSRob Herring  Firmware implementing the PSCI functions described in ARM document number
145025ef8bSRob Herring  ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
155025ef8bSRob Herring  processors") can be used by Linux to initiate various CPU-centric power
165025ef8bSRob Herring  operations.
175025ef8bSRob Herring
185025ef8bSRob Herring  Issue A of the specification describes functions for CPU suspend, hotplug
195025ef8bSRob Herring  and migration of secure software.
205025ef8bSRob Herring
215025ef8bSRob Herring  Functions are invoked by trapping to the privilege level of the PSCI
225025ef8bSRob Herring  firmware (specified as part of the binding below) and passing arguments
235025ef8bSRob Herring  in a manner similar to that specified by AAPCS:
245025ef8bSRob Herring
255025ef8bSRob Herring     r0       => 32-bit Function ID / return value
265025ef8bSRob Herring    {r1 - r3}	=> Parameters
275025ef8bSRob Herring
285025ef8bSRob Herring  Note that the immediate field of the trapping instruction must be set
295025ef8bSRob Herring  to #0.
305025ef8bSRob Herring
315025ef8bSRob Herring  [2] Power State Coordination Interface (PSCI) specification
325025ef8bSRob Herring    http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
335025ef8bSRob Herring
345025ef8bSRob Herringproperties:
35b203bb5fSUlf Hansson  $nodename:
36b203bb5fSUlf Hansson    const: psci
37b203bb5fSUlf Hansson
385025ef8bSRob Herring  compatible:
395025ef8bSRob Herring    oneOf:
405025ef8bSRob Herring      - description:
415025ef8bSRob Herring          For implementations complying to PSCI versions prior to 0.2.
425025ef8bSRob Herring        const: arm,psci
435025ef8bSRob Herring
445025ef8bSRob Herring      - description:
455025ef8bSRob Herring          For implementations complying to PSCI 0.2.
465025ef8bSRob Herring          Function IDs are not required and should be ignored by an OS with
475025ef8bSRob Herring          PSCI 0.2 support, but are permitted to be present for compatibility
485025ef8bSRob Herring          with existing software when "arm,psci" is later in the compatible
495025ef8bSRob Herring          list.
50b18c56a6SRob Herring        minItems: 1
515025ef8bSRob Herring        items:
525025ef8bSRob Herring          - const: arm,psci-0.2
535025ef8bSRob Herring          - const: arm,psci
545025ef8bSRob Herring
555025ef8bSRob Herring      - description:
565025ef8bSRob Herring          For implementations complying to PSCI 1.0.
575025ef8bSRob Herring          PSCI 1.0 is backward compatible with PSCI 0.2 with minor
585025ef8bSRob Herring          specification updates, as defined in the PSCI specification[2].
59b18c56a6SRob Herring        minItems: 1
605025ef8bSRob Herring        items:
615025ef8bSRob Herring          - const: arm,psci-1.0
625025ef8bSRob Herring          - const: arm,psci-0.2
63b18c56a6SRob Herring          - const: arm,psci
645025ef8bSRob Herring
655025ef8bSRob Herring  method:
665025ef8bSRob Herring    description: The method of calling the PSCI firmware.
673d21a460SRob Herring    $ref: /schemas/types.yaml#/definitions/string-array
683d21a460SRob Herring    enum:
695025ef8bSRob Herring      - smc
705025ef8bSRob Herring      # HVC #0, with the register assignments specified in this binding.
715025ef8bSRob Herring      - hvc
725025ef8bSRob Herring
735025ef8bSRob Herring  cpu_suspend:
745025ef8bSRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
755025ef8bSRob Herring    description: Function ID for CPU_SUSPEND operation
765025ef8bSRob Herring
775025ef8bSRob Herring  cpu_off:
785025ef8bSRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
795025ef8bSRob Herring    description: Function ID for CPU_OFF operation
805025ef8bSRob Herring
815025ef8bSRob Herring  cpu_on:
825025ef8bSRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
835025ef8bSRob Herring    description: Function ID for CPU_ON operation
845025ef8bSRob Herring
855025ef8bSRob Herring  migrate:
865025ef8bSRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
875025ef8bSRob Herring    description: Function ID for MIGRATE operation
885025ef8bSRob Herring
895025ef8bSRob Herring  arm,psci-suspend-param:
905025ef8bSRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
915025ef8bSRob Herring    description: |
925025ef8bSRob Herring      power_state parameter to pass to the PSCI suspend call.
935025ef8bSRob Herring
945025ef8bSRob Herring      Device tree nodes that require usage of PSCI CPU_SUSPEND function (ie
955025ef8bSRob Herring      idle state nodes with entry-method property is set to "psci", as per
965025ef8bSRob Herring      bindings in [1]) must specify this property.
975025ef8bSRob Herring
985025ef8bSRob Herring      [1] Kernel documentation - ARM idle states bindings
991bd524f7SAnup Patel        Documentation/devicetree/bindings/cpu/idle-states.yaml
1005025ef8bSRob Herring
101d2334a91SUlf HanssonpatternProperties:
102d2334a91SUlf Hansson  "^power-domain-":
103*02478c98SKrzysztof Kozlowski    $ref: /schemas/power/power-domain.yaml#
1043d21a460SRob Herring
105d2334a91SUlf Hansson    type: object
106d2334a91SUlf Hansson    description: |
107a3f048b5SUlf Hansson      ARM systems can have multiple cores, sometimes in an hierarchical
108a3f048b5SUlf Hansson      arrangement. This often, but not always, maps directly to the processor
109a3f048b5SUlf Hansson      power topology of the system. Individual nodes in a topology have their
110a3f048b5SUlf Hansson      own specific power states and can be better represented hierarchically.
111a3f048b5SUlf Hansson
112a3f048b5SUlf Hansson      For these cases, the definitions of the idle states for the CPUs and the
113a3f048b5SUlf Hansson      CPU topology, must conform to the binding in [3]. The idle states
114a3f048b5SUlf Hansson      themselves must conform to the binding in [4] and must specify the
115a3f048b5SUlf Hansson      arm,psci-suspend-param property.
116a3f048b5SUlf Hansson
117a3f048b5SUlf Hansson      It should also be noted that, in PSCI firmware v1.0 the OS-Initiated
118a3f048b5SUlf Hansson      (OSI) CPU suspend mode is introduced. Using a hierarchical representation
119a3f048b5SUlf Hansson      helps to implement support for OSI mode and OS implementations may choose
120a3f048b5SUlf Hansson      to mandate it.
121a3f048b5SUlf Hansson
122d2334a91SUlf Hansson      [3] Documentation/devicetree/bindings/power/power-domain.yaml
1233261227dSUlf Hansson      [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
124a3f048b5SUlf Hansson
1255025ef8bSRob Herringrequired:
1265025ef8bSRob Herring  - compatible
1275025ef8bSRob Herring  - method
1285025ef8bSRob Herring
1295025ef8bSRob HerringallOf:
1305025ef8bSRob Herring  - if:
1315025ef8bSRob Herring      properties:
1325025ef8bSRob Herring        compatible:
1335025ef8bSRob Herring          contains:
1345025ef8bSRob Herring            const: arm,psci
1355025ef8bSRob Herring    then:
1365025ef8bSRob Herring      required:
1375025ef8bSRob Herring        - cpu_off
1385025ef8bSRob Herring        - cpu_on
1395025ef8bSRob Herring
140b203bb5fSUlf HanssonadditionalProperties: false
141b203bb5fSUlf Hansson
1425025ef8bSRob Herringexamples:
1435025ef8bSRob Herring  - |+
1445025ef8bSRob Herring
1455025ef8bSRob Herring    // Case 1: PSCI v0.1 only.
1465025ef8bSRob Herring
1475025ef8bSRob Herring    psci {
1485025ef8bSRob Herring      compatible      = "arm,psci";
1495025ef8bSRob Herring      method          = "smc";
1505025ef8bSRob Herring      cpu_suspend     = <0x95c10000>;
1515025ef8bSRob Herring      cpu_off         = <0x95c10001>;
1525025ef8bSRob Herring      cpu_on          = <0x95c10002>;
1535025ef8bSRob Herring      migrate         = <0x95c10003>;
1545025ef8bSRob Herring    };
1555025ef8bSRob Herring
1565025ef8bSRob Herring  - |+
1575025ef8bSRob Herring
1585025ef8bSRob Herring    // Case 2: PSCI v0.2 only
1595025ef8bSRob Herring
1605025ef8bSRob Herring    psci {
1615025ef8bSRob Herring      compatible      = "arm,psci-0.2";
1625025ef8bSRob Herring      method          = "smc";
1635025ef8bSRob Herring    };
1645025ef8bSRob Herring
1655025ef8bSRob Herring
1665025ef8bSRob Herring  - |+
1675025ef8bSRob Herring
1685025ef8bSRob Herring    // Case 3: PSCI v0.2 and PSCI v0.1.
1695025ef8bSRob Herring
1705025ef8bSRob Herring    /*
1715025ef8bSRob Herring     * A DTB may provide IDs for use by kernels without PSCI 0.2 support,
1725025ef8bSRob Herring     * enabling firmware and hypervisors to support existing and new kernels.
1735025ef8bSRob Herring     * These IDs will be ignored by kernels with PSCI 0.2 support, which will
1745025ef8bSRob Herring     * use the standard PSCI 0.2 IDs exclusively.
1755025ef8bSRob Herring     */
1765025ef8bSRob Herring
1775025ef8bSRob Herring    psci {
1785025ef8bSRob Herring      compatible = "arm,psci-0.2", "arm,psci";
1795025ef8bSRob Herring      method = "hvc";
1805025ef8bSRob Herring
1815025ef8bSRob Herring      cpu_on = <0x95c10002>;
1825025ef8bSRob Herring      cpu_off = <0x95c10001>;
1835025ef8bSRob Herring    };
184a3f048b5SUlf Hansson
185a3f048b5SUlf Hansson  - |+
186a3f048b5SUlf Hansson
187a3f048b5SUlf Hansson    // Case 4: CPUs and CPU idle states described using the hierarchical model.
188a3f048b5SUlf Hansson
189a3f048b5SUlf Hansson    cpus {
190a3f048b5SUlf Hansson      #size-cells = <0>;
191a3f048b5SUlf Hansson      #address-cells = <1>;
192a3f048b5SUlf Hansson
193a3f048b5SUlf Hansson      CPU0: cpu@0 {
194a3f048b5SUlf Hansson        device_type = "cpu";
195ac9686a9SUlf Hansson        compatible = "arm,cortex-a53";
196a3f048b5SUlf Hansson        reg = <0x0>;
197a3f048b5SUlf Hansson        enable-method = "psci";
198a3f048b5SUlf Hansson        power-domains = <&CPU_PD0>;
199a3f048b5SUlf Hansson        power-domain-names = "psci";
200a3f048b5SUlf Hansson      };
201a3f048b5SUlf Hansson
202a3f048b5SUlf Hansson      CPU1: cpu@1 {
203a3f048b5SUlf Hansson        device_type = "cpu";
204ac9686a9SUlf Hansson        compatible = "arm,cortex-a53";
205a3f048b5SUlf Hansson        reg = <0x100>;
206a3f048b5SUlf Hansson        enable-method = "psci";
207a3f048b5SUlf Hansson        power-domains = <&CPU_PD1>;
208a3f048b5SUlf Hansson        power-domain-names = "psci";
209a3f048b5SUlf Hansson      };
210a3f048b5SUlf Hansson
211a3f048b5SUlf Hansson      idle-states {
212a3f048b5SUlf Hansson
213a3f048b5SUlf Hansson        CPU_PWRDN: cpu-power-down {
214a3f048b5SUlf Hansson          compatible = "arm,idle-state";
215a3f048b5SUlf Hansson          arm,psci-suspend-param = <0x0000001>;
216a3f048b5SUlf Hansson          entry-latency-us = <10>;
217a3f048b5SUlf Hansson          exit-latency-us = <10>;
218a3f048b5SUlf Hansson          min-residency-us = <100>;
219a3f048b5SUlf Hansson        };
220d2334a91SUlf Hansson      };
221d2334a91SUlf Hansson
222d2334a91SUlf Hansson      domain-idle-states {
223a3f048b5SUlf Hansson
224a3f048b5SUlf Hansson        CLUSTER_RET: cluster-retention {
225a3f048b5SUlf Hansson          compatible = "domain-idle-state";
226a3f048b5SUlf Hansson          arm,psci-suspend-param = <0x1000011>;
227a3f048b5SUlf Hansson          entry-latency-us = <500>;
228a3f048b5SUlf Hansson          exit-latency-us = <500>;
229a3f048b5SUlf Hansson          min-residency-us = <2000>;
230a3f048b5SUlf Hansson        };
231a3f048b5SUlf Hansson
232a3f048b5SUlf Hansson        CLUSTER_PWRDN: cluster-power-down {
233a3f048b5SUlf Hansson          compatible = "domain-idle-state";
234a3f048b5SUlf Hansson          arm,psci-suspend-param = <0x1000031>;
235a3f048b5SUlf Hansson          entry-latency-us = <2000>;
236a3f048b5SUlf Hansson          exit-latency-us = <2000>;
237a3f048b5SUlf Hansson          min-residency-us = <6000>;
238a3f048b5SUlf Hansson        };
239a3f048b5SUlf Hansson      };
240a3f048b5SUlf Hansson    };
241a3f048b5SUlf Hansson
242a3f048b5SUlf Hansson    psci {
243a3f048b5SUlf Hansson      compatible = "arm,psci-1.0";
244a3f048b5SUlf Hansson      method = "smc";
245a3f048b5SUlf Hansson
246d2334a91SUlf Hansson      CPU_PD0: power-domain-cpu0 {
247a3f048b5SUlf Hansson        #power-domain-cells = <0>;
248a3f048b5SUlf Hansson        domain-idle-states = <&CPU_PWRDN>;
249a3f048b5SUlf Hansson        power-domains = <&CLUSTER_PD>;
250a3f048b5SUlf Hansson      };
251a3f048b5SUlf Hansson
252d2334a91SUlf Hansson      CPU_PD1: power-domain-cpu1 {
253a3f048b5SUlf Hansson        #power-domain-cells = <0>;
254a3f048b5SUlf Hansson        domain-idle-states =  <&CPU_PWRDN>;
255a3f048b5SUlf Hansson        power-domains = <&CLUSTER_PD>;
256a3f048b5SUlf Hansson      };
257a3f048b5SUlf Hansson
258d2334a91SUlf Hansson      CLUSTER_PD: power-domain-cluster {
259a3f048b5SUlf Hansson        #power-domain-cells = <0>;
260a3f048b5SUlf Hansson        domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
261a3f048b5SUlf Hansson      };
262a3f048b5SUlf Hansson    };
2635025ef8bSRob Herring...
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