1cba3c40dSFabien Parent# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2cba3c40dSFabien Parent%YAML 1.2 3cba3c40dSFabien Parent--- 4*4b71ed9fSRob Herring$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml# 5*4b71ed9fSRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 6cba3c40dSFabien Parent 7cba3c40dSFabien Parenttitle: MediaTek mmsys controller 8cba3c40dSFabien Parent 9cba3c40dSFabien Parentmaintainers: 10cba3c40dSFabien Parent - Matthias Brugger <matthias.bgg@gmail.com> 11cba3c40dSFabien Parent 12cba3c40dSFabien Parentdescription: 13cba3c40dSFabien Parent The MediaTek mmsys system controller provides clock control, routing control, 14cba3c40dSFabien Parent and miscellaneous control in mmsys partition. 15cba3c40dSFabien Parent 16cba3c40dSFabien Parentproperties: 17cba3c40dSFabien Parent $nodename: 18cba3c40dSFabien Parent pattern: "^syscon@[0-9a-f]+$" 19cba3c40dSFabien Parent 20cba3c40dSFabien Parent compatible: 21cba3c40dSFabien Parent oneOf: 22cba3c40dSFabien Parent - items: 23cba3c40dSFabien Parent - enum: 24cba3c40dSFabien Parent - mediatek,mt2701-mmsys 25cba3c40dSFabien Parent - mediatek,mt2712-mmsys 26cba3c40dSFabien Parent - mediatek,mt6765-mmsys 27cba3c40dSFabien Parent - mediatek,mt6779-mmsys 28d5099c95SAngeloGioacchino Del Regno - mediatek,mt6795-mmsys 29cba3c40dSFabien Parent - mediatek,mt6797-mmsys 30cba3c40dSFabien Parent - mediatek,mt8167-mmsys 31cba3c40dSFabien Parent - mediatek,mt8173-mmsys 32cba3c40dSFabien Parent - mediatek,mt8183-mmsys 33eb1b02beSRex-BC Chen - mediatek,mt8186-mmsys 342433c716SNathan Lu - mediatek,mt8188-vdosys0 3575d6e7d9SLinus Torvalds - mediatek,mt8192-mmsys 3682219cfbSNancy.Lin - mediatek,mt8195-vdosys1 371873da26SMoudy Ho - mediatek,mt8195-vppsys0 381873da26SMoudy Ho - mediatek,mt8195-vppsys1 39f72999f5SFabien Parent - mediatek,mt8365-mmsys 40cba3c40dSFabien Parent - const: syscon 41b237efd4SJason-JH.Lin 42b237efd4SJason-JH.Lin - description: vdosys0 and vdosys1 are 2 display HW pipelines, 43b237efd4SJason-JH.Lin so mt8195 binding should be deprecated. 44b237efd4SJason-JH.Lin deprecated: true 45b237efd4SJason-JH.Lin items: 46b237efd4SJason-JH.Lin - const: mediatek,mt8195-mmsys 47b237efd4SJason-JH.Lin - const: syscon 48b237efd4SJason-JH.Lin 49cba3c40dSFabien Parent - items: 50cba3c40dSFabien Parent - const: mediatek,mt7623-mmsys 51cba3c40dSFabien Parent - const: mediatek,mt2701-mmsys 52cba3c40dSFabien Parent - const: syscon 53cba3c40dSFabien Parent 54b237efd4SJason-JH.Lin - items: 55b237efd4SJason-JH.Lin - const: mediatek,mt8195-vdosys0 56b237efd4SJason-JH.Lin - const: mediatek,mt8195-mmsys 57b237efd4SJason-JH.Lin - const: syscon 58b237efd4SJason-JH.Lin 59cba3c40dSFabien Parent reg: 60cba3c40dSFabien Parent maxItems: 1 61cba3c40dSFabien Parent 621da90b8aSjason-jh.lin power-domains: 631da90b8aSjason-jh.lin description: 641da90b8aSjason-jh.lin A phandle and PM domain specifier as defined by bindings 651da90b8aSjason-jh.lin of the power controller specified by phandle. See 661da90b8aSjason-jh.lin Documentation/devicetree/bindings/power/power-domain.yaml for details. 671da90b8aSjason-jh.lin 681da90b8aSjason-jh.lin mboxes: 691da90b8aSjason-jh.lin description: 701da90b8aSjason-jh.lin Using mailbox to communicate with GCE, it should have this 711da90b8aSjason-jh.lin property and list of phandle, mailbox specifiers. See 72cd425807SAngeloGioacchino Del Regno Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml 73cd425807SAngeloGioacchino Del Regno for details. 741da90b8aSjason-jh.lin $ref: /schemas/types.yaml#/definitions/phandle-array 751da90b8aSjason-jh.lin 761da90b8aSjason-jh.lin mediatek,gce-client-reg: 771da90b8aSjason-jh.lin description: 781da90b8aSjason-jh.lin The register of client driver can be configured by gce with 4 arguments 791da90b8aSjason-jh.lin defined in this property, such as phandle of gce, subsys id, 801da90b8aSjason-jh.lin register offset and size. 811da90b8aSjason-jh.lin Each subsys id is mapping to a base address of display function blocks 821da90b8aSjason-jh.lin register which is defined in the gce header 831da90b8aSjason-jh.lin include/dt-bindings/gce/<chip>-gce.h. 841da90b8aSjason-jh.lin $ref: /schemas/types.yaml#/definitions/phandle-array 851da90b8aSjason-jh.lin maxItems: 1 861da90b8aSjason-jh.lin 87cba3c40dSFabien Parent "#clock-cells": 88cba3c40dSFabien Parent const: 1 89cba3c40dSFabien Parent 906046ffc3SEnric Balletbo i Serra '#reset-cells': 916046ffc3SEnric Balletbo i Serra const: 1 926046ffc3SEnric Balletbo i Serra 93cba3c40dSFabien Parentrequired: 94cba3c40dSFabien Parent - compatible 95cba3c40dSFabien Parent - reg 96cba3c40dSFabien Parent - "#clock-cells" 97cba3c40dSFabien Parent 98cba3c40dSFabien ParentadditionalProperties: false 99cba3c40dSFabien Parent 100cba3c40dSFabien Parentexamples: 101cba3c40dSFabien Parent - | 1021da90b8aSjason-jh.lin #include <dt-bindings/power/mt8173-power.h> 1031da90b8aSjason-jh.lin #include <dt-bindings/gce/mt8173-gce.h> 1041da90b8aSjason-jh.lin 105cba3c40dSFabien Parent mmsys: syscon@14000000 { 106cba3c40dSFabien Parent compatible = "mediatek,mt8173-mmsys", "syscon"; 107cba3c40dSFabien Parent reg = <0x14000000 0x1000>; 1081da90b8aSjason-jh.lin power-domains = <&spm MT8173_POWER_DOMAIN_MM>; 109cba3c40dSFabien Parent #clock-cells = <1>; 1106046ffc3SEnric Balletbo i Serra #reset-cells = <1>; 1111da90b8aSjason-jh.lin mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, 1121da90b8aSjason-jh.lin <&gce 1 CMDQ_THR_PRIO_HIGHEST>; 1131da90b8aSjason-jh.lin mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; 114cba3c40dSFabien Parent }; 115