1*626b134bSMacpaul LinMediatek mipi0a (mipi_rx_ana_csi0a) controller 2*626b134bSMacpaul Lin============================ 3*626b134bSMacpaul Lin 4*626b134bSMacpaul LinThe Mediatek mipi0a controller provides various clocks 5*626b134bSMacpaul Linto the system. 6*626b134bSMacpaul Lin 7*626b134bSMacpaul LinRequired Properties: 8*626b134bSMacpaul Lin 9*626b134bSMacpaul Lin- compatible: Should be one of: 10*626b134bSMacpaul Lin - "mediatek,mt6765-mipi0a", "syscon" 11*626b134bSMacpaul Lin- #clock-cells: Must be 1 12*626b134bSMacpaul Lin 13*626b134bSMacpaul LinThe mipi0a controller uses the common clk binding from 14*626b134bSMacpaul LinDocumentation/devicetree/bindings/clock/clock-bindings.txt 15*626b134bSMacpaul LinThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 16*626b134bSMacpaul Lin 17*626b134bSMacpaul LinThe mipi0a controller also uses the common power domain from 18*626b134bSMacpaul LinDocumentation/devicetree/bindings/soc/mediatek/scpsys.txt 19*626b134bSMacpaul LinThe available power doamins are defined in dt-bindings/power/mt*-power.h. 20*626b134bSMacpaul Lin 21*626b134bSMacpaul LinExample: 22*626b134bSMacpaul Lin 23*626b134bSMacpaul Linmipi0a: clock-controller@11c10000 { 24*626b134bSMacpaul Lin compatible = "mediatek,mt6765-mipi0a", "syscon"; 25*626b134bSMacpaul Lin reg = <0 0x11c10000 0 0x1000>; 26*626b134bSMacpaul Lin power-domains = <&scpsys MT6765_POWER_DOMAIN_CAM>; 27*626b134bSMacpaul Lin #clock-cells = <1>; 28*626b134bSMacpaul Lin}; 29