1626b134bSMacpaul LinMediatek mipi0a (mipi_rx_ana_csi0a) controller 2626b134bSMacpaul Lin============================ 3626b134bSMacpaul Lin 4626b134bSMacpaul LinThe Mediatek mipi0a controller provides various clocks 5626b134bSMacpaul Linto the system. 6626b134bSMacpaul Lin 7626b134bSMacpaul LinRequired Properties: 8626b134bSMacpaul Lin 9626b134bSMacpaul Lin- compatible: Should be one of: 10626b134bSMacpaul Lin - "mediatek,mt6765-mipi0a", "syscon" 11626b134bSMacpaul Lin- #clock-cells: Must be 1 12626b134bSMacpaul Lin 13626b134bSMacpaul LinThe mipi0a controller uses the common clk binding from 14626b134bSMacpaul LinDocumentation/devicetree/bindings/clock/clock-bindings.txt 15626b134bSMacpaul LinThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 16626b134bSMacpaul Lin 17626b134bSMacpaul LinThe mipi0a controller also uses the common power domain from 18626b134bSMacpaul LinDocumentation/devicetree/bindings/soc/mediatek/scpsys.txt 19*47aab533SBjorn HelgaasThe available power domains are defined in dt-bindings/power/mt*-power.h. 20626b134bSMacpaul Lin 21626b134bSMacpaul LinExample: 22626b134bSMacpaul Lin 23626b134bSMacpaul Linmipi0a: clock-controller@11c10000 { 24626b134bSMacpaul Lin compatible = "mediatek,mt6765-mipi0a", "syscon"; 25626b134bSMacpaul Lin reg = <0 0x11c10000 0 0x1000>; 26626b134bSMacpaul Lin power-domains = <&scpsys MT6765_POWER_DOMAIN_CAM>; 27626b134bSMacpaul Lin #clock-cells = <1>; 28626b134bSMacpaul Lin}; 29