1*30fdd373SVineet Gupta* ARC Performance Counters 2*30fdd373SVineet Gupta 3*30fdd373SVineet GuptaThe ARC700 can be configured with a pipeline performance monitor for counting 4*30fdd373SVineet GuptaCPU and cache events like cache misses and hits. Like conventional PCT there 5*30fdd373SVineet Guptaare 100+ hardware conditions dynamically mapped to up to 32 counters 6*30fdd373SVineet Gupta 7*30fdd373SVineet GuptaNote that: 8*30fdd373SVineet Gupta * The ARC 700 PCT does not support interrupts; although HW events may be 9*30fdd373SVineet Gupta counted, the HW events themselves cannot serve as a trigger for a sample. 10*30fdd373SVineet Gupta 11*30fdd373SVineet GuptaRequired properties: 12*30fdd373SVineet Gupta 13*30fdd373SVineet Gupta- compatible : should contain 14*30fdd373SVineet Gupta "snps,arc700-pct" 15*30fdd373SVineet Gupta 16*30fdd373SVineet GuptaExample: 17*30fdd373SVineet Gupta 18*30fdd373SVineet Guptapmu { 19*30fdd373SVineet Gupta compatible = "snps,arc700-pct"; 20*30fdd373SVineet Gupta}; 21