1728c1471SMauro Carvalho Chehab============================ 2728c1471SMauro Carvalho ChehabDMA with ISA and LPC devices 3728c1471SMauro Carvalho Chehab============================ 4728c1471SMauro Carvalho Chehab 5728c1471SMauro Carvalho Chehab:Author: Pierre Ossman <drzeus@drzeus.cx> 6728c1471SMauro Carvalho Chehab 7728c1471SMauro Carvalho ChehabThis document describes how to do DMA transfers using the old ISA DMA 8728c1471SMauro Carvalho Chehabcontroller. Even though ISA is more or less dead today the LPC bus 9728c1471SMauro Carvalho Chehabuses the same DMA system so it will be around for quite some time. 10728c1471SMauro Carvalho Chehab 11728c1471SMauro Carvalho ChehabHeaders and dependencies 12728c1471SMauro Carvalho Chehab------------------------ 13728c1471SMauro Carvalho Chehab 14728c1471SMauro Carvalho ChehabTo do ISA style DMA you need to include two headers:: 15728c1471SMauro Carvalho Chehab 16728c1471SMauro Carvalho Chehab #include <linux/dma-mapping.h> 17728c1471SMauro Carvalho Chehab #include <asm/dma.h> 18728c1471SMauro Carvalho Chehab 19728c1471SMauro Carvalho ChehabThe first is the generic DMA API used to convert virtual addresses to 20*a822b2eeSMauro Carvalho Chehabbus addresses (see Documentation/core-api/dma-api.rst for details). 21728c1471SMauro Carvalho Chehab 22728c1471SMauro Carvalho ChehabThe second contains the routines specific to ISA DMA transfers. Since 23728c1471SMauro Carvalho Chehabthis is not present on all platforms make sure you construct your 24728c1471SMauro Carvalho ChehabKconfig to be dependent on ISA_DMA_API (not ISA) so that nobody tries 25728c1471SMauro Carvalho Chehabto build your driver on unsupported platforms. 26728c1471SMauro Carvalho Chehab 27728c1471SMauro Carvalho ChehabBuffer allocation 28728c1471SMauro Carvalho Chehab----------------- 29728c1471SMauro Carvalho Chehab 30728c1471SMauro Carvalho ChehabThe ISA DMA controller has some very strict requirements on which 31728c1471SMauro Carvalho Chehabmemory it can access so extra care must be taken when allocating 32728c1471SMauro Carvalho Chehabbuffers. 33728c1471SMauro Carvalho Chehab 34728c1471SMauro Carvalho Chehab(You usually need a special buffer for DMA transfers instead of 35728c1471SMauro Carvalho Chehabtransferring directly to and from your normal data structures.) 36728c1471SMauro Carvalho Chehab 37728c1471SMauro Carvalho ChehabThe DMA-able address space is the lowest 16 MB of _physical_ memory. 38728c1471SMauro Carvalho ChehabAlso the transfer block may not cross page boundaries (which are 64 39728c1471SMauro Carvalho Chehabor 128 KiB depending on which channel you use). 40728c1471SMauro Carvalho Chehab 41728c1471SMauro Carvalho ChehabIn order to allocate a piece of memory that satisfies all these 42728c1471SMauro Carvalho Chehabrequirements you pass the flag GFP_DMA to kmalloc. 43728c1471SMauro Carvalho Chehab 44728c1471SMauro Carvalho ChehabUnfortunately the memory available for ISA DMA is scarce so unless you 45728c1471SMauro Carvalho Chehaballocate the memory during boot-up it's a good idea to also pass 46728c1471SMauro Carvalho Chehab__GFP_RETRY_MAYFAIL and __GFP_NOWARN to make the allocator try a bit harder. 47728c1471SMauro Carvalho Chehab 48728c1471SMauro Carvalho Chehab(This scarcity also means that you should allocate the buffer as 49728c1471SMauro Carvalho Chehabearly as possible and not release it until the driver is unloaded.) 50728c1471SMauro Carvalho Chehab 51728c1471SMauro Carvalho ChehabAddress translation 52728c1471SMauro Carvalho Chehab------------------- 53728c1471SMauro Carvalho Chehab 54728c1471SMauro Carvalho ChehabTo translate the virtual address to a bus address, use the normal DMA 55728c1471SMauro Carvalho ChehabAPI. Do _not_ use isa_virt_to_bus() even though it does the same 56728c1471SMauro Carvalho Chehabthing. The reason for this is that the function isa_virt_to_bus() 57728c1471SMauro Carvalho Chehabwill require a Kconfig dependency to ISA, not just ISA_DMA_API which 58728c1471SMauro Carvalho Chehabis really all you need. Remember that even though the DMA controller 59728c1471SMauro Carvalho Chehabhas its origins in ISA it is used elsewhere. 60728c1471SMauro Carvalho Chehab 61728c1471SMauro Carvalho ChehabNote: x86_64 had a broken DMA API when it came to ISA but has since 62728c1471SMauro Carvalho Chehabbeen fixed. If your arch has problems then fix the DMA API instead of 63728c1471SMauro Carvalho Chehabreverting to the ISA functions. 64728c1471SMauro Carvalho Chehab 65728c1471SMauro Carvalho ChehabChannels 66728c1471SMauro Carvalho Chehab-------- 67728c1471SMauro Carvalho Chehab 68728c1471SMauro Carvalho ChehabA normal ISA DMA controller has 8 channels. The lower four are for 69728c1471SMauro Carvalho Chehab8-bit transfers and the upper four are for 16-bit transfers. 70728c1471SMauro Carvalho Chehab 71728c1471SMauro Carvalho Chehab(Actually the DMA controller is really two separate controllers where 72728c1471SMauro Carvalho Chehabchannel 4 is used to give DMA access for the second controller (0-3). 73728c1471SMauro Carvalho ChehabThis means that of the four 16-bits channels only three are usable.) 74728c1471SMauro Carvalho Chehab 75728c1471SMauro Carvalho ChehabYou allocate these in a similar fashion as all basic resources: 76728c1471SMauro Carvalho Chehab 77728c1471SMauro Carvalho Chehabextern int request_dma(unsigned int dmanr, const char * device_id); 78728c1471SMauro Carvalho Chehabextern void free_dma(unsigned int dmanr); 79728c1471SMauro Carvalho Chehab 80728c1471SMauro Carvalho ChehabThe ability to use 16-bit or 8-bit transfers is _not_ up to you as a 81728c1471SMauro Carvalho Chehabdriver author but depends on what the hardware supports. Check your 82728c1471SMauro Carvalho Chehabspecs or test different channels. 83728c1471SMauro Carvalho Chehab 84728c1471SMauro Carvalho ChehabTransfer data 85728c1471SMauro Carvalho Chehab------------- 86728c1471SMauro Carvalho Chehab 87728c1471SMauro Carvalho ChehabNow for the good stuff, the actual DMA transfer. :) 88728c1471SMauro Carvalho Chehab 89728c1471SMauro Carvalho ChehabBefore you use any ISA DMA routines you need to claim the DMA lock 90728c1471SMauro Carvalho Chehabusing claim_dma_lock(). The reason is that some DMA operations are 91728c1471SMauro Carvalho Chehabnot atomic so only one driver may fiddle with the registers at a 92728c1471SMauro Carvalho Chehabtime. 93728c1471SMauro Carvalho Chehab 94728c1471SMauro Carvalho ChehabThe first time you use the DMA controller you should call 95728c1471SMauro Carvalho Chehabclear_dma_ff(). This clears an internal register in the DMA 96728c1471SMauro Carvalho Chehabcontroller that is used for the non-atomic operations. As long as you 97728c1471SMauro Carvalho Chehab(and everyone else) uses the locking functions then you only need to 98728c1471SMauro Carvalho Chehabreset this once. 99728c1471SMauro Carvalho Chehab 100728c1471SMauro Carvalho ChehabNext, you tell the controller in which direction you intend to do the 101728c1471SMauro Carvalho Chehabtransfer using set_dma_mode(). Currently you have the options 102728c1471SMauro Carvalho ChehabDMA_MODE_READ and DMA_MODE_WRITE. 103728c1471SMauro Carvalho Chehab 104728c1471SMauro Carvalho ChehabSet the address from where the transfer should start (this needs to 105728c1471SMauro Carvalho Chehabbe 16-bit aligned for 16-bit transfers) and how many bytes to 106728c1471SMauro Carvalho Chehabtransfer. Note that it's _bytes_. The DMA routines will do all the 107728c1471SMauro Carvalho Chehabrequired translation to values that the DMA controller understands. 108728c1471SMauro Carvalho Chehab 109728c1471SMauro Carvalho ChehabThe final step is enabling the DMA channel and releasing the DMA 110728c1471SMauro Carvalho Chehablock. 111728c1471SMauro Carvalho Chehab 112728c1471SMauro Carvalho ChehabOnce the DMA transfer is finished (or timed out) you should disable 113728c1471SMauro Carvalho Chehabthe channel again. You should also check get_dma_residue() to make 114728c1471SMauro Carvalho Chehabsure that all data has been transferred. 115728c1471SMauro Carvalho Chehab 116728c1471SMauro Carvalho ChehabExample:: 117728c1471SMauro Carvalho Chehab 118728c1471SMauro Carvalho Chehab int flags, residue; 119728c1471SMauro Carvalho Chehab 120728c1471SMauro Carvalho Chehab flags = claim_dma_lock(); 121728c1471SMauro Carvalho Chehab 122728c1471SMauro Carvalho Chehab clear_dma_ff(); 123728c1471SMauro Carvalho Chehab 124728c1471SMauro Carvalho Chehab set_dma_mode(channel, DMA_MODE_WRITE); 125728c1471SMauro Carvalho Chehab set_dma_addr(channel, phys_addr); 126728c1471SMauro Carvalho Chehab set_dma_count(channel, num_bytes); 127728c1471SMauro Carvalho Chehab 128728c1471SMauro Carvalho Chehab dma_enable(channel); 129728c1471SMauro Carvalho Chehab 130728c1471SMauro Carvalho Chehab release_dma_lock(flags); 131728c1471SMauro Carvalho Chehab 132728c1471SMauro Carvalho Chehab while (!device_done()); 133728c1471SMauro Carvalho Chehab 134728c1471SMauro Carvalho Chehab flags = claim_dma_lock(); 135728c1471SMauro Carvalho Chehab 136728c1471SMauro Carvalho Chehab dma_disable(channel); 137728c1471SMauro Carvalho Chehab 138728c1471SMauro Carvalho Chehab residue = dma_get_residue(channel); 139728c1471SMauro Carvalho Chehab if (residue != 0) 140728c1471SMauro Carvalho Chehab printk(KERN_ERR "driver: Incomplete DMA transfer!" 141728c1471SMauro Carvalho Chehab " %d bytes left!\n", residue); 142728c1471SMauro Carvalho Chehab 143728c1471SMauro Carvalho Chehab release_dma_lock(flags); 144728c1471SMauro Carvalho Chehab 145728c1471SMauro Carvalho ChehabSuspend/resume 146728c1471SMauro Carvalho Chehab-------------- 147728c1471SMauro Carvalho Chehab 148728c1471SMauro Carvalho ChehabIt is the driver's responsibility to make sure that the machine isn't 149728c1471SMauro Carvalho Chehabsuspended while a DMA transfer is in progress. Also, all DMA settings 150728c1471SMauro Carvalho Chehabare lost when the system suspends so if your driver relies on the DMA 151728c1471SMauro Carvalho Chehabcontroller being in a certain state then you have to restore these 152728c1471SMauro Carvalho Chehabregisters upon resume. 153