xref: /openbmc/linux/Documentation/arch/x86/x86_64/machinecheck.rst (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1*ff61f079SJonathan Corbet.. SPDX-License-Identifier: GPL-2.0
2*ff61f079SJonathan Corbet
3*ff61f079SJonathan Corbet===============================================================
4*ff61f079SJonathan CorbetConfigurable sysfs parameters for the x86-64 machine check code
5*ff61f079SJonathan Corbet===============================================================
6*ff61f079SJonathan Corbet
7*ff61f079SJonathan CorbetMachine checks report internal hardware error conditions detected
8*ff61f079SJonathan Corbetby the CPU. Uncorrected errors typically cause a machine check
9*ff61f079SJonathan Corbet(often with panic), corrected ones cause a machine check log entry.
10*ff61f079SJonathan Corbet
11*ff61f079SJonathan CorbetMachine checks are organized in banks (normally associated with
12*ff61f079SJonathan Corbeta hardware subsystem) and subevents in a bank. The exact meaning
13*ff61f079SJonathan Corbetof the banks and subevent is CPU specific.
14*ff61f079SJonathan Corbet
15*ff61f079SJonathan Corbetmcelog knows how to decode them.
16*ff61f079SJonathan Corbet
17*ff61f079SJonathan CorbetWhen you see the "Machine check errors logged" message in the system
18*ff61f079SJonathan Corbetlog then mcelog should run to collect and decode machine check entries
19*ff61f079SJonathan Corbetfrom /dev/mcelog. Normally mcelog should be run regularly from a cronjob.
20*ff61f079SJonathan Corbet
21*ff61f079SJonathan CorbetEach CPU has a directory in /sys/devices/system/machinecheck/machinecheckN
22*ff61f079SJonathan Corbet(N = CPU number).
23*ff61f079SJonathan Corbet
24*ff61f079SJonathan CorbetThe directory contains some configurable entries. See
25*ff61f079SJonathan CorbetDocumentation/ABI/testing/sysfs-mce for more details.
26*ff61f079SJonathan Corbet
27*ff61f079SJonathan CorbetTBD document entries for AMD threshold interrupt configuration
28*ff61f079SJonathan Corbet
29*ff61f079SJonathan CorbetFor more details about the x86 machine check architecture
30*ff61f079SJonathan Corbetsee the Intel and AMD architecture manuals from their developer websites.
31*ff61f079SJonathan Corbet
32*ff61f079SJonathan CorbetFor more details about the architecture
33*ff61f079SJonathan Corbetsee http://one.firstfloor.org/~andi/mce.pdf
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