xref: /openbmc/linux/Documentation/arch/sh/register-banks.rst (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1*d47a97bdSJonathan Corbet.. SPDX-License-Identifier: GPL-2.0
2*d47a97bdSJonathan Corbet
3*d47a97bdSJonathan Corbet==========================================
4*d47a97bdSJonathan CorbetNotes on register bank usage in the kernel
5*d47a97bdSJonathan Corbet==========================================
6*d47a97bdSJonathan Corbet
7*d47a97bdSJonathan CorbetIntroduction
8*d47a97bdSJonathan Corbet------------
9*d47a97bdSJonathan Corbet
10*d47a97bdSJonathan CorbetThe SH-3 and SH-4 CPU families traditionally include a single partial register
11*d47a97bdSJonathan Corbetbank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
12*d47a97bdSJonathan Corbetmay have more full-featured banking or simply no such capabilities at all.
13*d47a97bdSJonathan Corbet
14*d47a97bdSJonathan CorbetSR.RB banking
15*d47a97bdSJonathan Corbet-------------
16*d47a97bdSJonathan Corbet
17*d47a97bdSJonathan CorbetIn the case of this type of banking, banked registers are mapped directly to
18*d47a97bdSJonathan Corbetr0 ... r7 if SR.RB is set to the bank we are interested in, otherwise ldc/stc
19*d47a97bdSJonathan Corbetcan still be used to reference the banked registers (as r0_bank ... r7_bank)
20*d47a97bdSJonathan Corbetwhen in the context of another bank. The developer must keep the SR.RB value
21*d47a97bdSJonathan Corbetin mind when writing code that utilizes these banked registers, for obvious
22*d47a97bdSJonathan Corbetreasons. Userspace is also not able to poke at the bank1 values, so these can
23*d47a97bdSJonathan Corbetbe used rather effectively as scratch registers by the kernel.
24*d47a97bdSJonathan Corbet
25*d47a97bdSJonathan CorbetPresently the kernel uses several of these registers.
26*d47a97bdSJonathan Corbet
27*d47a97bdSJonathan Corbet	- r0_bank, r1_bank (referenced as k0 and k1, used for scratch
28*d47a97bdSJonathan Corbet	  registers when doing exception handling).
29*d47a97bdSJonathan Corbet
30*d47a97bdSJonathan Corbet	- r2_bank (used to track the EXPEVT/INTEVT code)
31*d47a97bdSJonathan Corbet
32*d47a97bdSJonathan Corbet		- Used by do_IRQ() and friends for doing irq mapping based off
33*d47a97bdSJonathan Corbet		  of the interrupt exception vector jump table offset
34*d47a97bdSJonathan Corbet
35*d47a97bdSJonathan Corbet	- r6_bank (global interrupt mask)
36*d47a97bdSJonathan Corbet
37*d47a97bdSJonathan Corbet		- The SR.IMASK interrupt handler makes use of this to set the
38*d47a97bdSJonathan Corbet		  interrupt priority level (used by local_irq_enable())
39*d47a97bdSJonathan Corbet
40*d47a97bdSJonathan Corbet	- r7_bank (current)
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