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Searched refs:tccr (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/timer/
H A Drenesas_tmr.c69 if (tmr->tccr[ch] == 0) { in update_events()
72 if (FIELD_EX8(tmr->tccr[ch], TCCR, CSS) == 0) { in update_events()
77 if (FIELD_EX8(tmr->tccr[0], TCCR, CSS) == CSS_CASCADING) { in update_events()
101 next_time *= clkdiv[FIELD_EX8(tmr->tccr[ch], TCCR, CKS)]; in update_events()
110 int divrate = clkdiv[FIELD_EX8(tmr->tccr[ch], TCCR, CKS)]; in elapsed_time()
135 switch (FIELD_EX8(tmr->tccr[1], TCCR, CSS)) { in read_tcnt()
152 switch (FIELD_EX8(tmr->tccr[0], TCCR, CSS)) { in read_tcnt()
183 uint8_t tccr = 0; in read_tccr() local
184 tccr = FIELD_DP8(tccr, TCCR, TMRIS, in read_tccr()
186 tccr = FIELD_DP8(tccr, TCCR, CSS, in read_tccr()
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/openbmc/qemu/hw/intc/
H A Dopenpic.c688 uint32_t tog = ((tmr->tccr & TCCR_TOG) ^ TCCR_TOG); /* invert toggle. */ in qemu_timer_cb()
692 tmr->tccr = val | tog; in qemu_timer_cb()
716 tmr->tccr = tmr->tccr & TCCR_TOG; in openpic_tmr_set_tmr()
734 retval = tmr->tccr; in openpic_tmr_get_timer()
739 uint32_t count = (tmr->tccr & ~TCCR_TOG) - used_ticks; in openpic_tmr_get_timer()
740 retval = (uint32_t)((tmr->tccr & TCCR_TOG) | (count & ~TCCR_TOG)); in openpic_tmr_get_timer()
773 opp->timers[idx].tccr = val & ~TCCR_TOG; in openpic_tmr_write()
1307 opp->timers[i].tccr = 0; in openpic_reset()
1436 VMSTATE_UINT32(tccr, OpenPICTimer),
/openbmc/qemu/include/hw/timer/
H A Drenesas_tmr.h47 uint8_t tccr[TMR_CH]; member
/openbmc/qemu/include/hw/ppc/
H A Dopenpic.h99 uint32_t tccr; /* Global timer current count register */ member
/openbmc/linux/arch/powerpc/kvm/
H A Dmpic.c227 uint32_t tccr; /* Global timer current count register */ member
554 opp->timers[i].tccr = 0; in openpic_reset()
830 if ((opp->timers[idx].tccr & TCCR_TOG) != 0 && in openpic_tmr_write()
833 opp->timers[idx].tccr &= ~TCCR_TOG; in openpic_tmr_write()
867 retval = opp->timers[idx].tccr; in openpic_tmr_read()