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Searched refs:reg_bit_set (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c202 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init()
313 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_transfer()
404 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
410 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
416 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
422 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_cmd_set()
H A Dddr3_init.c381 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
382 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
384 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
386 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET); in ddr3_init_main()
H A Dddr3_init.h132 static inline void reg_bit_set(u32 addr, u32 mask) in reg_bit_set() function
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.c216 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init()
305 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
311 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
318 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
324 reg_bit_set(XOR_ACTIVATION_REG in mv_xor_command_set()
462 reg_bit_set(XOR_ACTIVATION_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_transfer()
H A Dmv_ddr_plat.c196 reg_bit_set(TSEN_CONTROL_MSB_REG, TSEN_CONTROL_MSB_RST_MASK); in ddr3_ctrl_get_junc_temp()
1222 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1223 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1226 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1229 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET); in mv_ddr_pre_training_soc_config()
1242 reg_bit_set(SDRAM_INIT_CTRL_REG, in mv_ddr_pre_training_soc_config()
H A Dddr_ml_wrapper.h138 static inline void reg_bit_set(u32 addr, u32 mask) in reg_bit_set() function
/openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/
H A Dctrl_pex.c345 reg_bit_set(PEX_CFG_DIRECT_ACCESS(pex_if, PEX_STATUS_AND_COMMAND), in pex_config_read()
/openbmc/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_lib.c1529 reg_bit_set(PEX_CFG_DIRECT_ACCESS(pex_if, PEX_STATUS_AND_COMMAND), in pex_cfg_read()