/openbmc/qemu/target/mips/tcg/ |
H A D | loong_translate.c | 52 tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); in gen_lext_DIV_G() 57 tcg_gen_brcondi_tl(TCG_COND_NE, t0, is_double ? LLONG_MIN : INT_MIN, l2); in gen_lext_DIV_G() 58 tcg_gen_brcondi_tl(TCG_COND_NE, t1, -1LL, l2); in gen_lext_DIV_G() 105 tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); in gen_lext_DIVU_G() 154 tcg_gen_brcondi_tl(TCG_COND_NE, t0, is_double ? LLONG_MIN : INT_MIN, l2); in gen_lext_MOD_G() 155 tcg_gen_brcondi_tl(TCG_COND_NE, t1, -1LL, l2); in gen_lext_MOD_G() 202 tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); in gen_lext_MODU_G()
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H A D | octeon_translate.c | 148 tcg_gen_setcond_tl(TCG_COND_NE, cpu_gpr[a->rd], t1, t0); in trans_SEQNE() 171 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_gpr[a->rt], t0, imm); in trans_SEQNEI()
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H A D | translate.c | 2715 tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rd], t0, t1, t2, cpu_gpr[rd]); in gen_cond_move() 2721 tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rd], t0, t1, t2, t1); in gen_cond_move() 3036 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_r6_muldiv() 3052 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_r6_muldiv() 3127 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_r6_muldiv() 3140 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_r6_muldiv() 3207 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_div1_tx79() 3262 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_muldiv() 3314 tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, tcg_constant_tl(0), t2, t1); in gen_muldiv() 4304 tcg_gen_brcond_tl(TCG_COND_NE, t0, t1, l1); in gen_trap() [all …]
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H A D | msa_translate.c | 251 return gen_msa_BxZ_V(ctx, a->wt, a->sa, TCG_COND_NE); in trans_BNZ_V() 265 gen_check_zero_element(bcond, df, wt, if_not ? TCG_COND_EQ : TCG_COND_NE); in gen_msa_BxZ()
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/openbmc/qemu/target/hexagon/ |
H A D | gen_tcg.h | 568 gen_cond_return(ctx, RddV, RsV, PvV, TCG_COND_NE) 572 gen_cond_return(ctx, RddV, RsV, PvN, TCG_COND_NE) 576 gen_cond_return(ctx, RddV, RsV, PvN, TCG_COND_NE) 581 gen_cond_return_subinsn(ctx, TCG_COND_NE, hex_pred[0]) 585 gen_cond_return_subinsn(ctx, TCG_COND_NE, ctx->new_pred_value[0]) 702 gen_cond_call(ctx, PuV, TCG_COND_NE, riV) 706 gen_cond_callr(ctx, TCG_COND_NE, PuV, RsV) 901 gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_NE, riV) 903 gen_cmpnd_tstbit0_jmp(ctx, 0, RsV, TCG_COND_NE, riV) 909 gen_cmpnd_tstbit0_jmp(ctx, 1, RsV, TCG_COND_NE, riV) [all …]
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H A D | genptr.c | 358 tcg_gen_brcond_tl(TCG_COND_NE, vaddr, hex_llsc_addr, fail); in gen_store_conditional4() 383 tcg_gen_brcond_tl(TCG_COND_NE, vaddr, hex_llsc_addr, fail); in gen_store_conditional8() 467 tcg_gen_movcond_tl(TCG_COND_NE, result, value, zero, ones, zero); in gen_8bitsof() 483 tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC], in gen_write_new_pc_addr() 639 gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, arg2, TCG_COND_NE, pc_off); in gen_cmpnd_cmp_jmp_f() 655 gen_cmpnd_cmp_jmp(ctx, pnum, cond, arg1, tmp, TCG_COND_NE, pc_off); in gen_cmpnd_cmpi_jmp_f() 857 tcg_gen_brcondi_tl(TCG_COND_NE, lpcfg, 1, label1); in gen_endloop0() 931 tcg_gen_brcondi_tl(TCG_COND_NE, lpcfg, 1, label1); in gen_endloop01() 1025 tcg_gen_setcond_tl(TCG_COND_NE, ovf, dst_sar, src); in gen_shl_sat() 1309 tcg_gen_movcond_i64(TCG_COND_NE, bits, word, zero, ones, zero); in vec_to_qvec() [all …]
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/openbmc/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_branch.c.inc | 76 TRANS(bne, ALL, gen_rr_bc, TCG_COND_NE) 82 TRANS(bnez, ALL, gen_rz_bc, TCG_COND_NE) 84 TRANS(bcnez, 64, gen_cz_bc, TCG_COND_NE)
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvi.c.inc | 114 tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned); 153 case TCG_COND_NE: 187 cond = TCG_COND_NE; 261 return gen_branch(ctx, a, TCG_COND_NE); 642 tcg_gen_movcond_tl(TCG_COND_NE, lr, shamt, zero, lr, zero); 645 tcg_gen_movcond_tl(TCG_COND_NE, destl, hs, zero, zero, ll); 646 tcg_gen_movcond_tl(TCG_COND_NE, desth, hs, zero, ll, h1); 684 tcg_gen_movcond_tl(TCG_COND_NE, ll, shamt, zero, ll, zero); 687 tcg_gen_movcond_tl(TCG_COND_NE, destl, hs, zero, h1, h0); 688 tcg_gen_movcond_tl(TCG_COND_NE, desth, hs, zero, zero, h1); [all …]
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H A D | trans_rvzicond.c.inc | 40 gen_czero(dest, src1, src2, TCG_COND_NE);
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H A D | trans_rva.c.inc | 66 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); 76 tcg_gen_setcond_tl(TCG_COND_NE, dest, dest, load_val);
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H A D | trans_rvm.c.inc | 194 tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp1, zero, one, source2); 269 tcg_gen_movcond_tl(TCG_COND_NE, temp1, temp1, zero, zero, source1);
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/openbmc/qemu/include/tcg/ |
H A D | tcg-cond.h | 43 TCG_COND_NE = 8 | 0 | 0 | 1, enumerator
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/openbmc/qemu/target/openrisc/ |
H A D | translate.c | 254 tcg_gen_negsetcond_tl(TCG_COND_NE, cpu_sr_ov, cpu_sr_ov, t0); in gen_mul() 262 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_sr_cy, cpu_sr_cy, 0); in gen_mulu() 309 tcg_gen_negsetcond_i64(TCG_COND_NE, t1, t1, high); in gen_muld() 330 tcg_gen_setcondi_i64(TCG_COND_NE, high, high, 0); in gen_muldu() 520 tcg_gen_movcond_tl(TCG_COND_NE, cpu_R(dc, a->d), cpu_sr_f, dc->zero, in trans_l_cmov() 618 do_bf(dc, a, TCG_COND_NE); in trans_l_bf() 712 tcg_gen_brcond_tl(TCG_COND_NE, ea, cpu_lock_addr, lab_fail); in trans_l_swa() 946 tcg_gen_setcond_tl(TCG_COND_NE, cpu_sr_f, in trans_l_sfne() 1015 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfnei()
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/openbmc/qemu/target/rx/ |
H A D | translate.c | 259 dc->cond = TCG_COND_NE; in psw_cond() 263 dc->cond = TCG_COND_NE; in psw_cond() 272 tcg_gen_setcondi_i32(TCG_COND_NE, dc->temp, cpu_psw_z, 0); in psw_cond() 274 dc->cond = (cond == 4) ? TCG_COND_NE : TCG_COND_EQ; in psw_cond() 296 dc->cond = (cond == 10) ? TCG_COND_NE : TCG_COND_EQ; in psw_cond() 747 stcond(TCG_COND_NE, a->rd, a->imm); in trans_STNZ() 1294 tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, cpu_psw_c, 0); in trans_SHLL_irr() 1324 tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, cpu_psw_c, 0); in trans_SHLL_rr() 1921 tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, val, 0); in rx_btstm() 1949 tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, t0, 0); in rx_btstr()
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/openbmc/qemu/target/tricore/ |
H A D | translate.c | 1352 tcg_gen_setcondi_tl(TCG_COND_NE, carry, cpu_PSW_C, 0); in gen_addc_CC() 1743 tcg_gen_setcondi_i64(TCG_COND_NE, t4, t4, 0); in gen_msub32_q() 1917 tcg_gen_setcondi_i64(TCG_COND_NE, t4, t4, 0); in gen_msubs32_q() 2177 tcg_gen_setcond_tl(TCG_COND_NE, cpu_PSW_V, high, low); in gen_mul_i32s() 2917 gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_d[15], 0, offset); in gen_compute_branch() 2928 gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_d[15], constant, offset); in gen_compute_branch() 2931 gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_d[15], in gen_compute_branch() 2943 gen_branch_condi(ctx, TCG_COND_NE, temp, 0, offset); in gen_compute_branch() 2955 gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[15], in gen_compute_branch() 2959 gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[15], in gen_compute_branch() [all …]
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/openbmc/qemu/target/xtensa/ |
H A D | translate.c | 560 tcg_gen_brcondi_i32(TCG_COND_NE, arg[2].in, 0, label); in gen_zero_check() 1184 tcg_gen_brcondi_i32(TCG_COND_NE, dc->next_icount, 0, label); in xtensa_tr_translate_insn() 1952 tcg_gen_brcondi_i32(TCG_COND_NE, arg[1].in, 0x80000000, in translate_quos() 1954 tcg_gen_brcondi_i32(TCG_COND_NE, arg[2].in, 0xffffffff, in translate_quos() 2212 tcg_gen_brcond_i32(TCG_COND_NE, addr, cpu_exclusive_addr, label); in translate_s32ex() 2778 .par = (const uint32_t[]){TCG_COND_NE}, 2799 .par = (const uint32_t[]){TCG_COND_NE}, 2806 .par = (const uint32_t[]){TCG_COND_NE}, 2908 .par = (const uint32_t[]){TCG_COND_NE}, 2915 .par = (const uint32_t[]){TCG_COND_NE}, [all …]
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate.c | 580 tcg_gen_setcondi_i64(TCG_COND_NE, cc_dst, cc_dst, 0); in gen_op_calc_cc() 659 TCG_COND_NE, TCG_COND_NE, /* | LT | GT | x */ 671 TCG_COND_NE, TCG_COND_NE, /* | NE | x | x */ 672 TCG_COND_NE, TCG_COND_NE, 760 cond = TCG_COND_NE; in disas_jcc() 775 cond = TCG_COND_NE; in disas_jcc() 778 cond = old_cc_op == CC_OP_ADDU ? TCG_COND_EQ : TCG_COND_NE; in disas_jcc() 781 cond = old_cc_op == CC_OP_ADDU ? TCG_COND_NE : TCG_COND_EQ; in disas_jcc() 889 cond = TCG_COND_NE; in disas_jcc() 1511 c.cond = TCG_COND_NE; in op_bct32() [all …]
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 1765 tcg_gen_movcond_i32(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_divw() 1771 tcg_gen_movcond_i32(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_divw() 1807 tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_divd() 1812 tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_divd() 1846 tcg_gen_movcond_i32(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_modw() 1876 tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); in gen_op_arith_modd() 2329 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_ca, cpu_ca, 0); in gen_srawi() 2410 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_ca, cpu_ca, 0); in gen_sradi() 3034 tcg_gen_movcond_tl(TCG_COND_NE, t1, t0, t1, in gen_ld_atomic() 3045 gen_fetch_inc_conditional(ctx, memop, EA, TCG_COND_NE, 1); in gen_ld_atomic() [all …]
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/openbmc/qemu/target/ppc/translate/ |
H A D | vmx-impl.c.inc | 898 tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, hi, lo); 905 tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, t1, hi); 907 tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, lo, hi); 908 tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, zero, lo); 957 tcg_gen_movcond_i64(TCG_COND_NE, t1, t0, zero, zero, ones); 968 tcg_gen_movcond_i64(TCG_COND_NE, t1, t0, zero, zero, ones); 1013 tcg_gen_movcond_i64(TCG_COND_NE, ah, t1, zero, al, ah); 1014 tcg_gen_movcond_i64(TCG_COND_NE, al, t1, zero, t0, al); 1191 TRANS_FLAGS2(ISA300, VCMPNEB, do_vcmp, TCG_COND_NE, MO_8) 1192 TRANS_FLAGS2(ISA300, VCMPNEH, do_vcmp, TCG_COND_NE, MO_16) [all …]
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H A D | fixedpoint-impl.c.inc | 477 tcg_gen_setcond_tl(TCG_COND_NE, cpu_ov, t0, t1); 605 tcg_gen_setcond_i64(TCG_COND_NE, cpu_ov, t0, t1); 753 tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[a->rt], t0, zr, 840 TCGCond cond = rev ? TCG_COND_EQ : TCG_COND_NE; 1164 tcg_gen_setcondi_i64(TCG_COND_NE, t1, t0, -1);
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/openbmc/qemu/target/alpha/ |
H A D | translate.c | 418 tcg_gen_brcond_i64(TCG_COND_NE, addr, cpu_lock_addr, lab_fail); in gen_store_conditional() 506 case TCG_COND_NE: in gen_fold_mzero() 1694 tcg_gen_movcond_i64(TCG_COND_NE, vc, va, load_zero(ctx), in translate_one() 2251 gen_fcmov(ctx, TCG_COND_NE, ra, rb, rc); in translate_one() 2807 ret = gen_fbcond(ctx, TCG_COND_NE, ra, disp21); in translate_one() 2839 ret = gen_bcond(ctx, TCG_COND_NE, ra, disp21); in translate_one()
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/openbmc/qemu/tcg/ |
H A D | optimize.c | 617 case TCG_COND_NE: in do_constant_folding_cond_32() 651 case TCG_COND_NE: in do_constant_folding_cond_64() 687 case TCG_COND_NE: in do_constant_folding_cond_eq() 1384 case TCG_COND_NE: in fold_brcond2() 2132 case TCG_COND_NE: in fold_setcond_zmask() 2157 case TCG_COND_NE: in fold_setcond_zmask() 2363 case TCG_COND_NE: in fold_setcond2()
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/openbmc/qemu/target/avr/ |
H A D | translate.c | 1280 ctx->skip_cond = TCG_COND_NE; in trans_SBRS() 1317 ctx->skip_cond = TCG_COND_NE; in trans_SBIS() 1365 tcg_gen_brcondi_i32(TCG_COND_NE, var, 0, not_taken); in trans_BRBC() 2631 case TCG_COND_NE: in canonicalize_skip() 2649 ctx->skip_cond = TCG_COND_NE; in canonicalize_skip()
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/openbmc/qemu/target/i386/tcg/ |
H A D | translate.c | 725 gen_op_j_ecx(s, TCG_COND_NE, label1); in gen_op_jnz_ecx() 878 return (CCPrepare) { .cond = eqz ? TCG_COND_EQ : TCG_COND_NE, in gen_prepare_val_nz() 915 return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_src, in gen_prepare_eflags_c() 924 return (CCPrepare) { .cond = TCG_COND_NE, in gen_prepare_eflags_c() 937 return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_dst, in gen_prepare_eflags_c() 955 return (CCPrepare) { .cond = TCG_COND_NE, .reg = reg, in gen_prepare_eflags_c() 994 return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_src2, in gen_prepare_eflags_o() 1000 return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_src }; in gen_prepare_eflags_o()
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/openbmc/qemu/target/microblaze/ |
H A D | translate.c | 528 tcg_gen_setcond_i32(TCG_COND_NE, out, ina, inb); in gen_pcmpne() 1007 tcg_gen_brcond_tl(TCG_COND_NE, cpu_res_addr, addr, swx_fail); in trans_swx() 1019 tcg_gen_brcond_i32(TCG_COND_NE, cpu_res_val, tval, swx_fail); in trans_swx() 1140 DO_BCC(bne, TCG_COND_NE) in DO_BCC()
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