Searched refs:MR0_REG (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_regs.h | 367 #define MR0_REG 0x15d0 macro
|
| H A D | ddr3_training.c | 176 {MRS0_CMD, MR0_REG},
529 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
533 MR0_REG, twr_mask_table[t_wr] << 9, in hws_ddr3_tip_init_controller()
1522 (dev_num, access_type, if_id, MR0_REG, in ddr3_tip_freq_set()
|