Searched refs:CLK_EN (Results 1 – 4 of 4) sorted by relevance
286 #define CLK_EN 0x1 macro307 #define CLK_GATE_IP_CAM_ALL_EN ((CLK_EN << BIT_CAM_CLK_PIXELASYNCM1)\308 | (CLK_EN << BIT_CAM_CLK_PIXELASYNCM0)\309 | (CLK_EN << BIT_CAM_CLK_PPMUCAMIF)\310 | (CLK_EN << BIT_CAM_CLK_QEFIMC3)\311 | (CLK_EN << BIT_CAM_CLK_QEFIMC2)\312 | (CLK_EN << BIT_CAM_CLK_QEFIMC1)\313 | (CLK_EN << BIT_CAM_CLK_QEFIMC0)\314 | (CLK_EN << BIT_CAM_CLK_SMMUJPEG)\315 | (CLK_EN << BIT_CAM_CLK_SMMUFIMC3)\[all …]
308 WREG32_FIELD(VCE_VCPU_CNTL, CLK_EN, 1); in vce_v3_0_start()345 WREG32_FIELD(VCE_VCPU_CNTL, CLK_EN, 0); in vce_v3_0_stop()
257 WREG32_FIELD(VCE_VCPU_CNTL, CLK_EN, 1); in vce_v2_0_start()
355 "GPIO_219_M.2CLK_EN",