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/openbmc/linux/drivers/clk/rockchip/
H A Dclk.cdiff 5d890c2df900db0197d46ec75383d7633ef41c82 Tue Aug 01 11:22:24 CDT 2017 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: add special approximation to fix up fractional clk's jitter

>From Rockchips fractional divider description:
3.1.9 Fractional divider usage
To get specific frequency, clocks of I2S, SPDIF, UARTcan be generated by
fractional divider. Generally you must set that denominator is 20 times
larger than numerator to generate precise clock frequency. So the
fractional divider applies only to generate low frequency clock like
I2S, UART.

Therefore add a special approximation function that handles this
special requirement.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>